LP3913SQX-AC/NOPB National Semiconductor, LP3913SQX-AC/NOPB Datasheet - Page 42

IC PWR MANAGEMENT W/CHRGR 48-LLP

LP3913SQX-AC/NOPB

Manufacturer Part Number
LP3913SQX-AC/NOPB
Description
IC PWR MANAGEMENT W/CHRGR 48-LLP
Manufacturer
National Semiconductor
Series
PowerWise®r
Datasheet

Specifications of LP3913SQX-AC/NOPB

Applications
Handheld/Mobile Devices
Voltage - Supply
2.5 V ~ 6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LLP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
LP3913SQX-AC
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INTERRUPTS AND STANDBY MODE
Interrupts are captured in standby mode and can be serviced
when the system processor is enabled when the LP3913 is in
an active state.
INTERRUPT SOURCES
CHG_IN Power Detected and CHG_IN Disconnect (INT0
and INT1) An interrupt (INT0) is generated when CHG_IN
power is connected to the LP3913. Another interrupt (INT1)
will be generated upon CHG_IN power removal.
USB Power Detected and USB Disconnect (INT2 and
INT3) An interrupt (INT2) is generated when USB power is
connected to the LP3913. Another interrupt (INT3) will be
generated upon disconnecting the USB power.
Battery Low (INT4) When the battery voltage drops below
the battery low threshold IRQ, an interrupt will be generated.
This allows the processor to perform some housekeeping
tasks prior to going to standby mode.
Thermal Alarm (INT5)If the Junction Temperature of the
LP3913 exceeds 115°C, then an interrupt will be generated
ADC Conversion Done (INT6)The ADC generates an inter-
rupt request upon the completion of a data conversion.
DC/DC Converters
OVERVIEW
The LP3913 provides the DC/DC converters that supply the
various power needs of the application by means of one
42
Charger Timer Interrupt (INT7) A charger timeout will occur
10 hours after it started (see Li-Ion Charger section) and will
subsequently request an interrupt.
IMR REGISTER (0C)H INTERRUPT MASK REGISTER
IRQ REGISTER (0d)h INTERRUPT REQUEST REGISTER
Buck3 (HDD driver), two Linear Low Drop Regulators (LDO1,
LDO2) and two Buck converters (BUCK1, BUCK2).
The table hereunder lists the output characteristics of the var-
ious regulators.
Access
Data
Reset
Access
Data
Reset
D7–0
r/w
1: Enable INTn (n=0…7) to pull IRQB low
0: Mask Interrupt source INTn
8’h00
D7–0
Read only
1: Interrupt IRQn (n=0…7) requested
0: No interrupt requested
8’h00
30000124

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