SE97BTP,547 NXP Semiconductors, SE97BTP,547 Datasheet
SE97BTP,547
Specifications of SE97BTP,547
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SE97BTP,547 Summary of contents
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... Rev. 01 — 27 January 2010 1. General description Meets JEDEC Specification 42.4 TSE2002B1, 3 Jun 2009. The NXP Semiconductors SE97B measures temperature from −40 °C to +125 °C with JEDEC Grade B ±1 °C maximum accuracy between +75 °C and +95 °C critical zone and also provide 256 bytes ...
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... NXP Semiconductors Table 1. Comparison of SE97 versus SE97B features Feature JEDEC specification Bit 8 ‘1’ Thermal Sensor shutdown Bit 8 ‘0’ Thermal Sensor active 2 I C-bus maximum frequency SCL and SDA V /V voltage levels IL IH Capabilities bit 6 SMBus Timeout EVENT pin operation ...
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... NXP Semiconductors Programmable hysteresis threshold: off, 0 °C, 1.5 °C, 3 °C, 6 °C Over/under/critical temperature EVENT output B-grade accuracy: ±0.5 °C/±1 °C (typ./max.) → +75 °C to +95 °C ±1.0 °C/±2 °C (typ./max.) → +40 °C to +125 °C ±2.0 °C/±3 °C (typ./max.) → −40 °C to +125 °C 2 ...
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... NXP Semiconductors 5. Block diagram SE97B TEMPERATURE REGISTER CRITICAL ALARM TRIP UPPER ALARM TRIP LOWER ALARM TRIP CAPABILITY MANUFACTURING ID DEVICE/REV ID SMBus TIMEOUT/ALERT CONFIGURATION • HYSTERESIS • SHUTDOWN TEMP SENSOR • LOCK PROTECTION • EVENT OUTPUT ON/OFF • EVENT OUTPUT POLARITY • EVENT OUTPUT STATUS • ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 2. 6.2 Pin description Table 3. Symbol SDA SCL EVENT V DD SE97B_1 Product data sheet DDR memory module temp sensor with integrated SPD terminal 1 index area Transparent top view Pin configuration for HWSON8 Pin description Pin ...
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... NXP Semiconductors 7. Functional description 7.1 Serial bus interface The SE97B communicates with a host controller by means of the 2-wire serial bus 2 (I C-bus/SMBus) that consists of a serial clock (SCL) and serial data (SDA) signals. The device supports SMBus, I speed is defined to have bus speeds from 100 kHz 400 kHz, and the SMBus is from 10 kHz to 100 kHz ...
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... NXP Semiconductors 7.3 EVENT output condition The EVENT output indicates conditions such as the temperature crossing a predefined boundary. The EVENT modes are very configurable and selected using the configuration register (CONFIG). The interrupt mode or comparator mode is selected using CONFIG[0], using either TCRIT/UPPER/LOWER or TCRIT only temperature bands (CONFIG[2]) as modified by hysteresis (CONFIG[10:9]) ...
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... NXP Semiconductors temperature (°C) critical Upper Boundary Alarm Lower Boundary Alarm EVENT in Comparator mode EVENT in Interrupt mode software interrupt clear EVENT in ‘Critical Temp only’ mode Refer to Table 4 for figure note information. Fig 4. EVENT output condition Table 4. EVENT output condition Figure ...
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... NXP Semiconductors 7.3.2 EVENT thresholds 7.3.2.1 Alarm window The device provides a comparison window with an UPPER trip point and a LOWER trip point, programmed through the Upper Boundary Alarm Trip register (02h), and Lower Boundary Alarm Trip register (03h). The Upper Boundary Alarm Trip register holds the ...
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... NXP Semiconductors 7.3.3 EVENT operation modes 7.3.3.1 Comparator mode In comparator mode, the EVENT output behaves like a window-comparator output that asserts when the temperature is outside the window (e.g., above the value programmed in the Upper Boundary Alarm Trip register or below the value programmed in the Lower Boundary Alarm Trip register or above the Critical Alarm Trip register if T selected) ...
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... NXP Semiconductors 7.4 Conversion rate The conversion time is the amount of time required for the ADC to complete a temperature measurement for the local temperature sensor. The conversion rate is the inverse of the conversion period which describes the number of cycles the temperature measurement completes in one second—the faster the conversion rate, the faster the temperature reading is updated. The SE97B’ ...
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... NXP Semiconductors Table 5 registers. Table 5. Register 01h 02h 03h 04h 22h 7.7 SMBus TIMEOUT The SE97B supports SMBus TIMEOUT feature. If the host holds SCL LOW more than 35 ms, the SE97B would reset its internal state machine to the bus IDLE state to prevent a system bus hang-up. This feature is turned on by default and release SDA. The SMBus TIMEOUT can be disabled by writing a ‘ ...
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... NXP Semiconductors START bit S 0 host detects SMBus ALERT Fig 5. How SE97B responds to SMBus Alert Response Address 7.9 SMBus/I The data registers in this device are selected by the Pointer Register. At power-up, the Pointer Register is set to ‘00h’, the location for the Capability Register. The Pointer Register latches the last location to which it was set ...
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... NXP Semiconductors SCL SDA S START device address and write by host SCL D15 D14 D13 D12 SDA by host most significant byte data A = ACK = Acknowledge bit Write bit = Read bit = 1. 2 Fig 7. SMBus/I C-bus write to the Pointer register followed by a write data word ...
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... NXP Semiconductors SCL SDA S START device address and read by host SCL D15 D14 D13 D12 SDA returned most significant byte data A = ACK = Acknowledge bit NACK = No Acknowledge bit Write bit = Read bit = 1. 2 Fig 9. SMBus/I C-bus word read from register with a pre-set pointer 7 ...
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... NXP Semiconductors 7.10.1 Write operations 7.10.1.1 Byte Write In Byte Write mode the master creates a START condition and then broadcasts the slave address, byte address, and data to be written. The slave acknowledges all 3 bytes by pulling down the SDA line during the ninth clock cycle following each byte. The master ...
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... NXP Semiconductors 7.10.1.3 Acknowledge polling Acknowledge polling can be used to determine if the SE97B is busy writing or is ready to accept commands. Polling is implemented by sending a ‘Selective Read’ command (described in acknowledge the slave address as long as internal write is in progress. 7.10.2 Memory Protection The lower half (the first 128 bytes) of the memory can be write protected by special EEPROM commands without an external control pin ...
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... NXP Semiconductors Up to eight memory devices can be connected on a single I 3-bit on the hardware selectable address (A2, A1, A0) inputs. The device only responds when the 4-bit fixed and hardware selectable bits are matched. The 8th bit is the read/write bit. This bit is set for read and write protection, respectively. ...
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... NXP Semiconductors 7.10.2.2 Reversible Write Protection (RWP) and Clear Reversible Write Protection (CRWP) If the software write-protection has been set with the RWP instruction, it can be cleared again with a CRWP instruction. The two instructions, RWP and CRWP have the same format as a Byte Write instruction, ...
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... NXP Semiconductors 7.10.3 Read operations 7.10.3.1 Current address read In Standby mode, the SE97B internal address counter points to the data byte immediately following the last byte accessed by a previous operation. If the ‘previous’ byte was the last byte in memory, then the address counter will point to the first memory byte, and so on. If the SE97B decodes a slave address with a ‘ ...
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... NXP Semiconductors 7.10.3.3 Sequential read If the master acknowledges the first data byte transmitted by the SE97B, then the device will continue transmitting as long as each data byte is acknowledged by the master (Figure will ‘wrap around’ to the beginning of memory, and so on. Sequential Read works with either ‘ ...
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... NXP Semiconductors 8. Register descriptions 8.1 Register overview This section describes all the registers used in the SE97B. The registers are used for latching the temperature reading, storing the low and high temperature limits, configuring, the hysteresis threshold of the ADC, as well as reporting status. The device uses the pointer register to access these registers ...
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... NXP Semiconductors 8.2 CAP — Capability register (00h, 16-bit read-only) Table 10. CAP - Capability register (address 00h) bit allocation Bit 15 Symbol Default 0 Access R Bit 7 Symbol EVSD TMOUT Default 1 Access R Table 11. Bit 15 4 SE97B_1 Product data sheet DDR memory module temp sensor with integrated SPD ...
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... NXP Semiconductors 8.3 CONFIG — Configuration register (01h, 16-bit read/write) Table 12. CONFIG - Configuration register (address 01h) bit allocation Bit 15 Symbol Default 0 Access R Bit 7 Symbol CTLB AWLB Default 0 Access R/W R/W Table 13. Bit 15:11 10:9 SE97B_1 Product data sheet DDR memory module temp sensor with integrated SPD ...
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... NXP Semiconductors Table 13. Bit SE97B_1 Product data sheet DDR memory module temp sensor with integrated SPD Configuration register (address 01h) bit description Symbol Description SHMD Shutdown Mode. 0 — Temperature Sensor is active and converting (default). 1 — disabled Temperature Sensor will not generate interrupts or update the temperature data ...
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... NXP Semiconductors Table 13. Bit SE97B_1 Product data sheet DDR memory module temp sensor with integrated SPD Configuration register (address 01h) bit description Symbol Description EOCTL EVENT Output Control. 0 — EVENT output disabled (default) 1 — EVENT output enabled When either of the Critical Trip or Alarm Window lock bits is set, this bit cannot be altered until unlocked ...
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... NXP Semiconductors Table 14. Hysteresis Enable Action Below Alarm Window bit (bit 13) Temperature Threshold slope temperature sets falling T trip(l) clears rising T trip(l) Above Alarm Window Below Alarm Window Fig 18. Hysteresis: how it works SE97B_1 Product data sheet DDR memory module temp sensor with integrated SPD ...
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... NXP Semiconductors 8.4 Temperature format The temperature data from the temperature read back register is an 11-bit 2’s complement word with the least significant bit (LSB) equal to 0.125 °C (resolution). A value of 019Ch will represent 25.75 °C • A value of 07C0h will represent 124 °C • ...
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... NXP Semiconductors 8.5 Temperature Trip Point registers While writing to the 16-bit Upper, Lower, or Critical Boundary Alarm Trip registers, please ensure that both bytes get written before doing a new START or STOP to ensure that a valid temperature value gets written into the registers. 8.5.1 UPPER — Upper Boundary Alarm Trip register (02h, 16-bit read/write) The value is the upper threshold temperature value for Alarm mode. The data format is 2’ ...
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... NXP Semiconductors 8.5.2 LOWER — Lower Boundary Alarm Trip register (03h, 16-bit read/write) The value is the lower threshold temperature value for Alarm mode. The data format is 2’s complement with bit 2 = 0.25 °C. RFU bits will always report zero. Interrupts will respond to the presently programmed boundary values ...
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... NXP Semiconductors 8.6 TEMP — Temperature register (05h, 16-bit read-only) Table 22. Bit Symbol Default Access Bit Symbol Default Access Table 23. Bit 11:1 0 SE97B_1 Product data sheet DDR memory module temp sensor with integrated SPD TEMP - Temperature register bit allocation ACT AAW ...
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... NXP Semiconductors 8.7 MANID — Manufacturer’s ID register (06h, 16-bit read-only) The SE97B Manufacturer’s ID register is intended to match NXP Semiconductors PCI SIG (1131h). Table 24. Bit Symbol Default Access Bit Symbol Default Access 8.8 DEVICEID — Device ID register (07h, 16-bit read-only) The SE97B device ID is A2h. The device revision is 03h. ...
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... NXP Semiconductors 8.9 SMBUS — SMBus register (22h, 8-bit read/write) Table 26. Bit Symbol Default Access Bit Symbol Default Access Table 27. Bit 15 SE97B_1 Product data sheet DDR memory module temp sensor with integrated SPD SMBUS - SMBus Time-out register bit allocation Disable RFU ...
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... NXP Semiconductors Table 27. Bit 1 0 [1] When the part comes out of shutdown, the state of the EVENT pin will not change until after the first temperature conversion. When the part enters shutdown, the ACT (TEMP[15]), AAW (TEMP[14]) and BAW (TEMP[13]) bits (flip-flops) will be cleared. ...
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... NXP Semiconductors 9. Application design-in information In a typical application, the SE97B behaves as a slave device and interfaces to a bus master (or host) via the SCL and SDA lines. The EVENT output is monitored by the host, and asserts when the temperature reading exceeds the programmed values in the alarm registers ...
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... NXP Semiconductors 9.1 SE97B in memory module application Figure 21 is centered in the memory module to monitor the temperature of the DRAM and also to provide a 2-kbit EEPROM as the Serial Presence Detect (SPD). In the event of overheating, the SE97B triggers the EVENT output and the memory controller throttles the memory bus to slow the DRAM ...
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... NXP Semiconductors V OL(SDA) V OL(EVENT) I OL(sink)(SDA) I OL(sink)EVENT Calculation example: T amb I DD(AV 3 Maximum V I OL(sink)(SDA) V OL(EVENT) I OL(sink)EVENT R th(j-a) Self heating due to power dissipation is: Δ 9.4 Hot plugging The SE97B can be used in hot plugging applications. Internal circuitry prevents damaging current backflow through the device when it is powered down, but with the I EVENT or address pins still connected ...
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... NXP Semiconductors 10. Limiting values Table 29. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol sink T j(max) T stg 11. Characteristics Table 30. Thermal sensor characteristics − 3 3 amb Symbol Parameter T temperature limit lim(acc) accuracy T temperature resolution res T conversion period conv E conversion rate error ...
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... NXP Semiconductors Table 31. DC characteristics − 3 3 amb Symbol Parameter V supply voltage DD I average supply current DD(AV) I supply current DD I supply voltage shutdown sd(VDD) mode current V HIGH-level input voltage IH V LOW-level input voltage IL V overvoltage input voltage I(ov) V LOW-level output voltage ...
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... NXP Semiconductors 320 I DD(AV) (μ 3 3.0 V 220 120 20 − C-bus inactive. Fig 22. Average supply current 5 I sd(VDD) (μ −1 − Fig 24. Shutdown supply current 0 (V) 0 3.0 V 0.1 0 − Fig 26. SDA output SE97B_1 Product data sheet DDR memory module temp sensor with integrated SPD ...
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... NXP Semiconductors 0. (V) 0. 0.08 3.0 V 0.04 0 − Fig 28. EVENT output 0. (V) 0. 3.0 V 0.08 0.04 0 − Fig 30. EVENT output 140 T conv (ms) 120 100 80 60 − Fig 32. Conversion period SE97B_1 Product data sheet DDR memory module temp sensor with integrated SPD ...
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... NXP Semiconductors 3 (V) 2.5 2.0 1.5 1.0 − For temp sensor conversion. Fig 34. Average power-on threshold voltage 3 (V) 2.5 2.0 1.5 1.0 − For EEPROM write operation. Fig 36. Average power-on threshold voltage SE97B_1 Product data sheet DDR memory module temp sensor with integrated SPD 002aad889 2 ...
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... NXP Semiconductors 3.0 T lim(acc) (°C) 1.5 0 −1.5 −3.0 − Fig 38. SE97B temperature accuracy SE97B_1 Product data sheet DDR memory module temp sensor with integrated SPD 002aaf189 120 thermal response (%) 120 0 T (°C) amb From 25 °C (air) to 120 °C (oil bath) at 3.3 V. ...
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... NXP Semiconductors Table 32. SMBus AC characteristics − 3 3 amb The AC specifications fully meet or exceed SMBus 2.0 specifications, but allow the bus to interface with the I to 400 kHz. Symbol Parameter f SCL clock frequency SCL t HIGH period of the SCL clock HIGH t LOW period of the SCL clock ...
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... NXP Semiconductors [9] The write cycle time is the time elapsed between the STOP command (following the write instruction) and the completion of the internal write cycle. During the internal write cycle, SDA is released by the slave and the device does not acknowledge external commands. ...
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... NXP Semiconductors 12. Package outline HWSON8: plastic thermal enhanced very very thin small outline package; no leads; 8 terminals; body 0 terminal 1 index area terminal 1 index area Dimensions (1) Unit max 0.80 0.05 0.65 mm nom 0.75 0.02 0.55 0.2 min 0.70 0.00 0.45 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... NXP Semiconductors 13. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 13.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...
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... NXP Semiconductors 13.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...
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... NXP Semiconductors Fig 42. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 14. Abbreviations Table 35. Acronym ADC ARA CDM CPU DDR DIMM DRAM EEPROM ESD HBM 2 I C-bus LSB ...
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... NXP Semiconductors Table 35. Acronym SMBus SO-DIMM SPD 15. Revision history Table 36. Revision history Document ID Release date SE97B_1 20100127 SE97B_1 Product data sheet DDR memory module temp sensor with integrated SPD Abbreviations …continued Description System Management Bus Small Outline Dual In-line Memory Module ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2.1 General features . . . . . . . . . . . . . . . . . . . . . . . . 2 2.2 Temperature sensor features . . . . . . . . . . . . . . 2 2.3 Serial EEPROM features . . . . . . . . . . . . . . . . . 3 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 7 Functional description . . . . . . . . . . . . . . . . . . . 6 7.1 Serial bus interface . . . . . . . . . . . . . . . . . . . . . . 6 7 ...
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... NXP Semiconductors 17 Contact information Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 DDR memory module temp sensor with integrated SPD Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp ...