HIP6521CBZ Intersil, HIP6521CBZ Datasheet - Page 8

• Manufacturer Part Number: HIP6521CBZ
• Description: IC CONTROLLER PWM TRIPLE 16-SOIC
• Manufacturer: Intersil

Specifications of HIP6521CBZ

• Pwm Type: Voltage Mode
• Number Of Outputs: 4
• Frequency - Max: 325kHz
• Duty Cycle: 100%
• Voltage - Supply: 4.5 V ~ 5.5 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 16-SOIC (3.9mm Width)
• Frequency-max: 325kHz
• Input Voltage: 5V
• Output Voltage: 4.5V
• Frequency: 300kHz
• Supply Voltage Range: 4.5V To 5.5V
• Digital Ic Case Style: SOIC
• No. Of Pins: 16
• Operating Temperature Range: 0°C To +70°C
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Control Mode: Voltage
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

equally large amounts of noise. The critical small signal
components are those connected to sensitive nodes or
those supplying critical bypass current.
The power components and the controller IC should be
placed first. Locate the input capacitors, especially the
high-frequency ceramic decoupling capacitors, close to the
power switches. Locate the output inductor and output
capacitors between the MOSFETs and the load. Locate the
PWM controller close to the MOSFETs.
The critical small signal components include the bypass
capacitor for VCC and the feedback resistors. Locate these
components close to their connecting pins on the control IC.
A multi-layer printed circuit board is recommended.
Figure 5 shows the connections of the critical components
in the converter. Note that the capacitors C
each represent numerous physical capacitors. Dedicate
one solid layer for a ground plane and make all critical
component ground connections with vias to this layer.
Dedicate another solid layer as a power plane and break
this plane into smaller islands of common voltage levels.
The power plane should support the input power and
output power nodes. Use copper filled polygons on the top
and bottom circuit layers for the PHASE nodes, but do not
unnecessarily oversize these particular islands. Since the
PHASE nodes are subjected to very high dV/dt voltages,
+5V
V
FIGURE 5. PRINTED CIRCUIT BOARD POWER PLANES AND
V
KEY
+3.3V
OUT3
IN
OUT2
+
+
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT OR POWER PLANE LAYER
VIA CONNECTION TO GROUND PLANE
IN
C
L
C
C
OUT3
IN
OUT2
IN
+
ISLANDS
Q4
Q3
+12V
DRIVE2
DRIVE3
VCC
HIP6521
C
VCC
PGND
8
GND
DRIVE4
OCSET
UGATE
PHASE
LGATE
C
Q2
OCSET
Q5
IN
Q1
R
L
C
CR1
C
and C
OCSET
OUT
OUT4
OUT1
+
+
OUT
V
OUT4
V
OUT1
HIP6521
the stray capacitor formed between these islands and the
surrounding circuitry will tend to couple switching noise.
Use the remaining printed circuit layers for small signal
wiring. The wiring traces from the control IC to the
MOSFET gate and source should be sized to carry 2A peak
currents.
PWM Controller Feedback Compensation
The PWM controller uses voltage-mode control for output
regulation. This section highlights the design consideration
for a PWM voltage-mode controller. Apply the methods and
considerations only to the PWM controller.
Figure 6 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(V
The error amplifier (Error Amp) output (V
with the oscillator (OSC) triangular wave to provide a
pulse-width modulated (PWM) wave with an amplitude of
V
output filter (L
The modulator transfer function is the small-signal transfer
function of V
Gain, given by V
with a double pole break frequency at F
F
ESR
IN
OUT
∆
FIGURE 6. VOLTAGE-MODE BUCK CONVERTER
V
at the PHASE node. The PWM wave is smoothed by the
OSC
.
) is regulated to the Reference voltage level, 0.8V.
OSC
V
E/A
OUT
COMPENSATION DESIGN
O
DETAILED COMPENSATION COMPONENTS
HIP6521
ERROR
and C
IN
AMP
/V
COMP
PWM
/V
E/A
Z
+
COMP
FB
-
+
OSC
O
C1
. This function is dominated by a DC
).
0.8V
C2
, and shaped by the output filter,
DRIVER1
+
R2
-
DRIVER
SYNC
0.8V
Z
IN
FB
Z
V
FB
IN
PHASE
LC
C3
E/A
(PARASITIC)
R
R
and a zero at
Z
L
S1
P1
) is compared
IN
O
R3
ESR
C
October 16, 2006
V
O
OUT
+
V
FN4837.5
OUT