ISL6753AAZA Intersil, ISL6753AAZA Datasheet

IC CTRLR ZVS FULL BRIDGE 16QSOP

ISL6753AAZA

Manufacturer Part Number
ISL6753AAZA
Description
IC CTRLR ZVS FULL BRIDGE 16QSOP
Manufacturer
Intersil
Datasheet

Specifications of ISL6753AAZA

Pwm Type
Voltage/Current Mode
Number Of Outputs
4
Frequency - Max
2MHz
Duty Cycle
100%
Voltage - Supply
9 V ~ 16 V
Buck
No
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
-40°C ~ 105°C
Package / Case
16-QSOP
Frequency-max
2MHz
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL6753AAZA
Manufacturer:
Intersil
Quantity:
882
Part Number:
ISL6753AAZA
Manufacturer:
INTERSIL
Quantity:
20 000
Part Number:
ISL6753AAZA-T
Manufacturer:
INTERSIL
Quantity:
20 000
Part Number:
ISL6753AAZA-T
0
ZVS Full-Bridge PWM Controller
The ISL6753 is a high-performance, low-pin-count
alternative, zero-voltage switching (ZVS) full-bridge PWM
controller. Like the ISL6551, it achieves ZVS operation by
driving the upper bridge FETs at a fixed 50% duty cycle while
the lower bridge FETS are trailing-edge modulated with
adjustable resonant switching delays. Compared to the more
familiar phase-shifted control method, this algorithm offers
equivalent efficiency and improved overcurrent and light-
load performance with less complexity in a lower pin count
package.
This advanced BiCMOS design features low operating
current, adjustable oscillator frequency up to 2MHz,
adjustable soft-start, internal over temperature protection,
precision deadtime and resonant delay control, and short
propagation delays. Additionally, Multi-Pulse Suppression
ensures alternating output pulses at low duty cycles where
pulse skipping may occur.
Ordering Information
Pinout
ISL6753AAZA
(See Note)
Add -T suffix to part number for tape and reel packaging
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
NUMBER
PART
RESDEL
CTBUF
ISL6753AAZ
RAMP
VERR
MARKING
RTD
CS
CT
FB
PART
1
2
3
4
5
6
7
8
ISL6753 (QSOP)
TOP VIEW
®
RANGE (°C) PACKAGE
-40 to 105
TEMP.
1
Data Sheet
16
15
14
13
12
11
10
9
16 Ld QSOP
(Pb-free)
VREF
SS
VDD
OUTLL
OUTLR
OUTUL
OUTUR
GND
M16.15A
DWG. #
PKG.
1-888-INTERSIL or 1-888-468-3774
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• Adjustable Resonant Delay for ZVS Operation
• Voltage- or Current-Mode Operation
• 3% Current Limit Threshold
• 175µA Startup Current
• Supply UVLO
• Adjustable Deadtime Control
• Adjustable Soft-Start
• Adjustable Oscillator Frequency Up to 2MHz
• Tight Tolerance Error Amplifier Reference Over Line,
• 5MHz GBWP Error Amplifier
• Adjustable Cycle-by-Cycle Peak Current Limit
• Fast Current Sense to Output Delay
• 70ns Leading Edge Blanking
• Multi-Pulse Suppression
• Buffered Oscillator Sawtooth Output
• Internal Over Temperature Protection
• Pb-Free Plus Anneal Available and ELV, WEEE,
Applications
• ZVS Full-Bridge Converters
• Telecom and Datacom Power
• Wireless Base Station Power
• File Server Power
• Industrial Power Systems
Load, and Temperature
RoHS Compliant
All other trademarks mentioned are the property of their respective owners.
April 4, 2006
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved
ISL6753
FN9182.2

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ISL6753AAZA Summary of contents

Page 1

... Ordering Information PART PART TEMP. NUMBER MARKING RANGE (°C) PACKAGE ISL6753AAZA ISL6753AAZ -40 to 105 (See Note) Add -T suffix to part number for tape and reel packaging NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...

Page 2

Functional Block Diagram VDD VREF UVLO OVER- TEMPERATURE PROTECTION GND VREF RESDEL OSCILLATOR CT RTD CTBUF SS 50% PWM STEERING LOGIC PWM + - 1.00V OVER CURRENT COMPARATOR 80mV + - 0.33 PWM COMPARATOR VREF SOFTSTART CONTROL VDD OUTUL OUTUR ...

Page 3

Typical Application - High Voltage Input ZVS Full-Bridge Converter P1 VIN+ Q1 FQB6N50 3 Q6 BSS138LT1 1 R13 2 10.0k R14 CR3 4. SS12 0805 C1-C4 33uF 450V + + R1 300 - 400 4.7k VDC 5% 2512 ...

Page 4

Absolute Maximum Ratings Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . GND - 0.3V to +20.0V OUTxxx . . . . . . . . . ...

Page 5

Electrical Specifications Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application schematic. 9V < VDD < 20V, RTD = 10.0kΩ 470pF 25°C (Continued) A PARAMETER Bias Current Clamp Voltage PULSE WIDTH ...

Page 6

Electrical Specifications Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application schematic. 9V < VDD < 20V, RTD = 10.0kΩ 470pF 25°C (Continued) A PARAMETER CTBUF VOL SOFT-START Charging Current SS ...

Page 7

Typical Performance Curves 1.02 1.01 1 0.99 0. 110 Temperature (C) FIGURE 1. REFERENCE VOLTAGE vs TEMPERATURE 100 ...

Page 8

For current-mode control this pin is connected to CS and the current loop feedback signal is applied to both inputs. For voltage-mode control, the oscillator sawtooth waveform may be buffered and used to generate ...

Page 9

Soft-Start Operation The ISL6753 features a soft-start using an external capacitor in conjunction with an internal current source. Soft-start reduces component stresses and surge currents during start-up. Upon start-up, the soft-start circuitry limits the error voltage input (VERR ...

Page 10

The charging time of the ramp capacitor is   RAMP PEAK ⋅ ⋅  --------------------------------------- -  – –   MIN For optimum performance, the ...

Page 11

For simplicity, idealized components have been used for this discussion, but the effect of magnetizing inductance must be considered when determining the amount of external ramp to add. Magnetizing inductance provides a degree of slope compensation to the current feedback ...

Page 12

If the application requires deadtime less than about 500ns, the CTBUF signal may not perform adequately for slope compensation. CTBUF lags the CT sawtooth waveform by 300-400ns. This behavior results in a non-zero value of CTBUF when the next half-cycle ...

Page 13

VIN VIN- FIGURE 11 POWER TRANSFER CYCLE The power transfer period terminates when switch LR turns off as determined by the PWM. The current ...

Page 14

The second power transfer period commences when switch LL closes. With switches UR and LL on, the primary and secondary currents flow as indicated below. VIN VIN- FIGURE 14 ...

Page 15

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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