ISL6560CB Intersil, ISL6560CB Datasheet - Page 6

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ISL6560CB

Manufacturer Part Number
ISL6560CB
Description
IC CORE VOLTAGE REG PWM 16-SOIC
Manufacturer
Intersil
Datasheet

Specifications of ISL6560CB

Pwm Type
Current Mode
Number Of Outputs
1
Frequency - Max
2MHz
Duty Cycle
50%
Voltage - Supply
3 V ~ 12 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
0°C ~ 70°C
Package / Case
16-SOIC (3.9mm Width)
Frequency-max
2MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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General Circuit Description
The ISL6560 is a two-power channel, current mode PWM
controller with input current sensing. A transconductance
error amplifier helps establish the desired droop voltage for
microprocessor power supplies and will be explained later.
Figure 1 is a functional system block diagram of the IC in a
power supply application. A single current sampling resistor,
R
for both channels via a comparator within the ISL6560. A
single comparator insures that both channels are monitored
by the same circuitry, helping to balance the operating
current of each channel. During normal operation the
comparator is tripped by the peak inductor current,
terminating the conduction cycle. As more current is needed
to supply the output load, the comparator threshold voltage
is increased, increasing the inductor current to
accommodate the increased load demands.
Circuit Operation
Figure 1 will be used to describes operation of the controller.
A transconductance error amplifier provides the major
voltage control function. The error amplifier’s positive input is
connected to an internal DAC that is programmed via a 5-bit
code from the microprocessor. Regulation is accomplished
SENSE
VOLTAGE
INPUT
, on the input side of the supply monitors the current
R
L
COMP
REF
FIGURE 1. FUNCTIONAL SYSTEM BLOCK DIAGRAM SHOWING MAJOR COMPONENTS
6
Comparator
+
CS+
R
Current
Reference
SENSE
Voltage
RESET
Amplifier
Error
-
gm
CS-
-
+
DRIVERS
OUTPUT
GATE
Logic
OSCILLATOR
ISL6560
and
SET
D/A
ISL6560
PWM1
PWM2
CT
FB
VID4
VID3
VID2
VID1
VID0
GND
by the amplifier attempting to make both inputs equal. This
does not happen because of the limited loop gain and
provides the bases for droop compensation mentioned
earlier and described below.
Figure 2 shows a curve of the current comparator threshold
voltage as a function of the error amplifier output voltage,
V
COMP
Threshold
FIGURE 2. CURRENT COMPARATOR THRESHOLD VOLTAGE
Disable
Output
. From this curve, it can be seen that as V
GATE DRIVER
OUTPUT FETs
GATE DRIVER
OUTPUT FETs
2.5
1.5
3.0
2.0
1.0
0.5
and
and
0
AS A FUNCTION OF VCOMP
{
0
20
40
60
V
CS(CL)
80
100
(mV)
120
+
140
V
COMP
CORE
160
FN9011.3

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