ISL6566CRZ-T Intersil, ISL6566CRZ-T Datasheet - Page 15

IC CTLR PWM BUCK 3PHASE 40-QFN

ISL6566CRZ-T

Manufacturer Part Number
ISL6566CRZ-T
Description
IC CTLR PWM BUCK 3PHASE 40-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6566CRZ-T

Applications
Controller, Intel VRM9, VRM10, and AMD Hammer Applications
Voltage - Input
3 ~ 12 V
Number Of Outputs
1
Voltage - Output
0.84 ~ 1.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
40-VFQFN, 40-VFQFPN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ISL6566CRZ-TCT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL6566CRZ-T
Manufacturer:
INTERSIL
Quantity:
3 340
As shown in Figure 6, a voltage, V
total current in all active channels, I
differential remote-sense amplifier. The resulting voltage at
the output of the remote-sense amplifier is the sum of the
output voltage and the droop voltage. As Equation 4 shows,
feeding this voltage into the compensation network causes
the regulator to adjust the output voltage so that it’s equal to
the reference voltage minus the droop voltage.
The droop voltage, V
current through the output inductors. This is accomplished
by using a continuous DCR current sensing method.
Inductor windings have a characteristic distributed
resistance or DCR (Direct Current Resistance). For
simplicity, the inductor DCR is considered as a separate
lumped quantity, as shown in Figure 7. The channel current,
I
Equation 5 shows the s-domain equivalent voltage, V
across the inductor.
The inductor DCR is important because the voltage dropped
across it is proportional to the channel current. By using a
simple R-C network and a current sense amplifier, as shown
in Figure 7, the voltage drop across all of the inductors DCRs
can be extracted. The output of the current sense amplifier,
V
currents I
If the R-C network components are selected such that the
R-C time constant matches the inductor L/DCR time
constant, then V
drops across the individual DCRs, multiplied by a gain. As
Equation 7 shows, V
total output current, I
V
L
V
V
DROOP
, flowing through the inductor, passes through the DCR.
DROOP
DROOP
L
s ( )
=
s ( )
, can be shown to be proportional to the channel
I
L1
L
=
=
, I
R
-------------------- - I
(
------------------------------------------------------------------------- -
(
s L
s R
COMP
L2
R
, and I
S
COMP
DROOP
+
DCR
-------------
DCR
s L
DROOP
OUT
DROOP
OUT
C
L3
+
COMP
)
1
, shown in Equation 6.
is equal to the sum of the voltage
.
DCR
, is created by sensing the
+
is therefore proportional to the
15
1
)
R
-----------------------
COMP
DROOP
R
OUT
S
, feeds into the
(
I
L1
, proportional to the
+
I
L2
+
I
L3
) DCR
(EQ. 5)
L
(EQ. 6)
(EQ. 7)
,
ISL6566
By simply adjusting the value of R
to any level, giving the converter the right amount of droop at
all load currents. It may also be necessary to compensate for
any changes in DCR due to temperature. These changes
cause the load line to be skewed, and cause the R-C time
constant to not match the L/DCR time constant. If this
becomes a problem a simple negative temperature
coefficient resistor network can be used in the place of
R
temperature.
Note: An optional 10nF ceramic capacitor from the ISUM
pin to the IREF pin is recommended to help reduce any
noise affects on the current sense amplifier due to layout.
Output-Voltage Offset Programming
The ISL6566 allows the designer to accurately adjust the
offset voltage by connecting a resistor, R
pin to VCC or GND. When R
and VCC, the voltage across it is regulated to 1.5V. This
causes a proportional current (I
and out of the FB pin. If R
voltage across it is regulated to 0.5V, and I
FB pin and out of the OFS pin. The offset current flowing
through the resistor between VDIFF and FB will generate the
desired offset voltage which is equal to the product (I
R
COMP
FB
). These functions are shown in Figures 8 and 9.
V
DROOP
ISL6566
to compensate for the rise in DCR due to
-
+
FIGURE 7. DCR SENSING CONFIGURATION
PHASE1
PHASE2
PHASE3
ICOMP
ISUM
IREF
(optional)
R
OFS
S
C
OFS
R
COMP
S
is connected to ground, the
OFS
is connected between OFS
R
S
S
, the load line can be set
) to flow into the OFS pin
R
I
I
I
L3
COMP
L2
INDUCTOR
L1
INDUCTOR
INDUCTOR
L
L
L
OFS
V
OFS
L
(s)
DCR
, from the OFS
DCR
DCR
-
flows into the
March 9, 2006
OFS
FN9178.4
C
I
OUT
V
OUT
OUT
x

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