LT1339ISW#PBF Linear Technology, LT1339ISW#PBF Datasheet - Page 8

• Manufacturer Part Number: LT1339ISW#PBF
• Description: IC DC/DC CONTROLLER HIPWR 20SOIC
• Manufacturer: Linear Technology
• Type: Step-Up (Boost)r

Specifications of LT1339ISW#PBF

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Current - Output: 65mA
• Frequency - Switching: 150kHz
• Voltage - Input: Up to 60V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Primary Input Voltage: 60V
• No. Of Outputs: 1
• Output Voltage: 54V
• Output Current: 65mA
• No. Of Pins: 20
• Operating Temperature Range: -40°C To +85°C
• Msl: MSL 1 - Unlimited
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Output: -
• Power - Output: -

OPERATION
LT1339
FU CTIO AL BLOCK DIAGRA
Basic Control Loop
The LT1339 uses a constant frequency, current mode
synchronous architecture. The timing of the IC is provided
through an internal oscillator circuit, which can be syn-
chronized to an external clock, programmable to operate
at frequencies up to 150kHz. The oscillator creates a
modified sawtooth wave at its timing node (CT) with a slow
charge, rapid discharge characteristic.
During typical positive buck operation, the main switch
MOSFET is enabled at the start of each oscillator cycle. The
main switch stays enabled until the current through the
switched inductor, sensed via the voltage across a series
8
U
V
OUT
+
V
U
IN
R
SENSE
U
MAIN
SWITCH
RUN/SHDN
SYNC
SWITCH
(Refer to Functional Block Diagram)
5V
V
V
REF
REF
FB
TG
TS
BG
SL/ADJ
SENSE
SENSE
0.5 A
5V
REFERENCE
1.25V
+
–
1.25V
V
BOOST
–
+
+
–
–
+
EA
SGND
NONOVERLAPPING
15
W
SWITCH LOGIC
CURRENT
SENSE AMP
SOFT START
CIRCUIT
PHASE
8 A
UVLO
PGND
CIRCUIT
ENABLE
sense resistor (R
comparator (IC1) and, in turn, reset the RS latch. When the
RS latch resets, the main switch is disabled, and the
synchronous switch MOSFET is enabled. Shoot-through
prevention logic prohibits enabling of the synchronous
switch until the main switch is fully disabled. If the current
comparator threshold is not obtained throughout the
entire oscillator charge period, the RS latch is bypassed
and the main switch is disabled during the oscillator
discharge time. This “minimum off time” assures ad-
equate charging of the bootstrap supply, protects the main
switch, and is typically about 1 s.
CT
SS
5V
50k
REF
2.5V
I
AVG
SENSE
–
+
ONE SHOT
OSC
), is sufficient to trip the current
AVERAGE
CURRENT
LIMIT
12V
+
–
IN
IC1
S
Q
R
1339 • BD
V
SYNC
C
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