ST1S10PUR STMicroelectronics, ST1S10PUR Datasheet - Page 14

• Manufacturer Part Number: ST1S10PUR
• Description: IC REG STEPDOWN 3A 900KHZ DFN8
• Manufacturer: STMicroelectronics
• Type: Step-Down (Buck)r

Specifications of ST1S10PUR

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 0.8 ~ 15.3 V
• Current - Output: 3A
• Frequency - Switching: 900kHz
• Voltage - Input: 2.5 ~ 18 V
• Operating Temperature: -25°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-DFN
• Output Voltage: 0.8 V to 15.3 V
• Output Current: 3 A
• Input Voltage: 2.5 V to 18 V
• Switching Frequency: 0.9 MHz
• Operating Temperature Range: - 25 C to + 125 C
• Mounting Style: SMD/SMT
• Duty Cycle (max): 90 %
• For Use With: 497-8407 - BOARD EVAL STP04CM05/ST1S10497-8216 - BOARD EVAL BASED ON ST1S10497-8229 - BOARD EVAL BASED ON ST1S10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-6313-2

Layout considerations
6
Figure 6.
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Layout considerations
Layout is an important step in design for all switching power supplies.
High-speed operation (900 kHz) of the ST1S10 device demands careful attention to PCB
layout. Care must be taken in board layout to get device performance, otherwise the
regulator could show poor line and load regulation, stability issues as well as EMI problems.
It is critical to provide a low inductance, impedance ground path. Therefore, use wide and
short traces for the main current paths.
The input capacitor must be placed as close as possible to the IC pins as well as the
inductor and output capacitor. Use a common ground node for power ground and a different
one for control ground (AGND) to minimize the effects of ground noise. Connect these
ground nodes together underneath the device and make sure that small signal components
returning to the AGND pin and do not share the high current path of C
The feedback voltage sense line (V
routed away from noisy components and traces (e.g., SW line). Its trace should be
minimized and shielded by a guard-ring connected to the ground.
PCB layout suggestion
Doc ID 13844 Rev 4
FB
) should be connected right to the output capacitor and
CN1 = Input power supply
CN2 = Enable/Disable
CN3 = Input sync.
CN4 = V
Input capacitor C1 must be
placed as close as possible
to the IC pins as well as the
inductor L1 and output
capacitor C2
Via holes from thermal pad
to bottom layer
IN
OUT
and C
OUT
.
ST1S10