LM5010AQ0MH/NOPB National Semiconductor, LM5010AQ0MH/NOPB Datasheet - Page 15

• Manufacturer Part Number: LM5010AQ0MH/NOPB
• Description: IC REG SW 1A SD 14TSSOP AUTO
• Manufacturer: National Semiconductor
• Type: Step-Down (Buck)r

Specifications of LM5010AQ0MH/NOPB

• Internal Switch(s): Yes
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Voltage - Output: 2.5 ~ 70 V
• Current - Output: 1A
• Frequency - Switching: 1MHz
• Voltage - Input: 6 ~ 75 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP Exposed Pad, 14-eTSSOP 14-HTSSOP
• Package: 14TSSOP EP
• Minimum Input Voltage: 6 V
• Maximum Input Voltage: 75 V
• Switching Frequency: 50 to 1000 KHz
• Operating Supply Voltage: 6 to 75 V
• Maximum Output Current: 1 A
• Output Type: Adjustable
• Output Voltage: 2.5 to 70 V
• Efficiency: 91 %
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -
• Other names: *LM5010AQ0MH/NOPB; LM5010AQ0MH

1000 pF capacitor at Cff and reducing R3 to 0.75Ω, the
V
160 mVp-p.
To reduce V
used. R3 has been removed, and the output ripple amplitude
is determined by C2’s ESR and the inductor ripple current. RA
and CA are chosen to generate a 40-50 mVp-p sawtooth at
their junction, and that voltage is AC-coupled to the FB pin via
CB. In selecting RA and CA, V
ground as the SW pin switches between V
the on-time at SW varies inversely with V
amplitude at the RA/CA junction is relatively constant. R1 and
R2 must typically be increased to more than 10k each to not
significantly attenuate the signal provided to FB through CB.
Typical values for the additional components are RA = 200k,
CA = 680 pF, and CB = 0.01 µF.
INCREASING THE CURRENT LIMIT THRESHOLD
The current limit threshold is nominally 1.25A, with a minimum
guaranteed value of 1.0A. If, at maximum load current, the
lower peak of the inductor current (I
1.0A, resistor R
increase the current limit threshold to equal or exceed that
lower peak current. This resistor diverts some of the recircu-
lating current from the internal sense resistor so that a higher
current level is needed to switch the internal current limit com-
parator. I
where I
minimum ripple current calculated using Equation 13. R
calculated from:
where 0.11Ω is the minimum value of the internal resistance
from SGND to ISEN. The next smaller standard value resistor
should be used for R
the circuit is in current limit, the upper peak current out of the
SW pin (I
OUT
FIGURE 11. Low Output Ripple Using Ripple Injection
ripple was reduced by 50%, ranging from 25 mVp-p to
O(max)
PK-
PK
in Figure 4) can be as high as:
OUT
is calculated from:
is the maximum load current, and I
CL
ripple further, the circuit of Figure 11 can be
must be added between S
CL
. With the addition of R
OUT
PK-
is considered a virtual
in Figure 5) exceeds
IN
IN
, the waveform
GND
and -1V. Since
CL
20153849
OR(min)
, and when
and I
SEN
is the
CL
(14)
(15)
to
is
15
where I
L1 and diode D1 must be rated for this current. If I
2A , the inductor value must be increased to reduce the ripple
amplitude. This will necessitate recalculation of I
and R
Increasing the circuit’s current limit will increase power dissi-
pation and the junction temperature within the LM5010A. See
the next section for guidelines on this issue.
PC BOARD LAYOUT and THERMAL CONSIDERATIONS
The LM5010A regulation, over-voltage, and current limit com-
parators are very fast, and will respond to short duration noise
pulses. Layout considerations are therefore critical for opti-
mum performance. The layout must be as neat and compact
as possible, and all the components must be as close as pos-
sible to their associated pins. The two major current loops
have currents which switch very fast, and so the loops should
be as small as possible to minimize conducted and radiated
EMI. The first loop is that formed by C1, through the VIN to
SW pins, L1, C2, and back to C1. The second loop is that
formed by D1, L1, C2, and the SGND and ISEN pins. The
ground connection from C2 to C1 should be as short and di-
rect as possible, preferably without going through vias. Di-
rectly connect the SGND and RTN pin to each other, and they
should be connected as directly as possible to the C1/C2
ground line without going through vias. The power dissipation
within the IC can be approximated by determining the total
conversion loss (P
losses in the free-wheeling diode and the inductor. The power
loss in the diode is approximately:
where Io is the load current, V
drop, and D is the duty cycle. The power loss in the inductor
is approximately:
where R
is an approximation for the AC losses. If it is expected that the
internal dissipation of the LM5010A will produce high junction
temperatures during normal operation, good use of the PC
board’s ground plane can help considerably to dissipate heat.
The exposed pad on the IC package bottom should be sol-
dered to a ground plane, and that plane should both extend
from beneath the IC, and be connected to exposed ground
plane on the board’s other side using as many vias as possi-
ble. The exposed pad is internally connected to the IC sub-
strate. The use of wide PC board traces at the pins, where
possible, can help conduct heat away from the IC. The four
No Connect pins on the TSSOP package are not electrically
connected to any part of the IC, and may be connected to
ground plane to help dissipate heat from the package. Judi-
cious positioning of the PC board within the end product,
along with the use of any available air flow (forced or natural
convection) can help reduce the junction temperature.
CL
OR(max)
.
L
is the inductor’s DC resistance, and the 1.1 factor
is calculated using Equation 12. The inductor
IN
P
P
- P
D1
L1
OUT
= I
= I
O
), and then subtracting the power
O
2
x V
F
x R
is the diode’s forward voltage
F
L
x (1-D)
x 1.1
www.national.com
OR(min)
PK
exceeds
, I
PK-
,