L6730B STMicroelectronics, L6730B Datasheet - Page 21

IC CTRLR ADJ STPDN SYNC 20-TSSOP

L6730B

Manufacturer Part Number
L6730B
Description
IC CTRLR ADJ STPDN SYNC 20-TSSOP
Manufacturer
STMicroelectronics
Type
Step-Down (Buck)r
Datasheet

Specifications of L6730B

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
Adj to 0.6V
Frequency - Switching
100kHz ~ 1MHz
Voltage - Input
1.8 ~ 14 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP Exposed Pad, 20-eTSSOP, 20-HTSSOP
Output Voltage
0.6 V
Input Voltage
1.8 V to 14 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Package
HTSSOP20
For Use With
497-5868 - EVAL BOARD 30A 400KHZ L6730497-5501 - EVAL BOARD FOR L6730XX
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Power - Output
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
L6730B
Manufacturer:
ST
0
Part Number:
L6730BTR
Manufacturer:
STM
Quantity:
3 172
Part Number:
L6730BTR
Manufacturer:
ST
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L6730 - L6730B
5.8
negative. This situation happens when the converter is sinking current for example and, in
this case, an adaptive dead time control operates.
Figure 13. Dead times
Monitoring and protection
The output voltage is monitored by the FB pin. If it is not within ±10% (typ.) of the
programmed value, the Power-Good (PGOOD) output is forced low. The PGOOD signal can
be delayed by adding an external capacitor on PGDelay pin (see
and
calculated with the following formula:
The device provides over voltage protection: when the voltage sensed on FB pin reaches a
value 20% (typ) greater than the reference, the low-side driver is turned on. If the OVP not-
latched mode has been set the low-side MOSFET is kept on as long as the overvoltage is
detected (see
Figure
14.); this can be useful to perform cascade sequencing. The delay can be
Figure
15.).The OVP latched-mode has been set the low-side MOSFET is
Doc ID 11938 Rev 3
PGDelay
= 5 .
0
C
( )
pF
Table 4: Pin connection
Device description
21/52

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