EL7554IRE-T13 Intersil, EL7554IRE-T13 Datasheet
EL7554IRE-T13
Specifications of EL7554IRE-T13
Related parts for EL7554IRE-T13
EL7554IRE-T13 Summary of contents
Page 1
... RANGE NUMBER MARKING (°C) EL7554IRE* 7554IRE - HTSSOP MDP0048 EL7554IREZ* 7554IREZ - HTSSOP (See Note) (Pb-free) *Add “-T7” or “-T13” suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets ...
Page 2
Typical Application Diagram R 2 10. 12.7K V OUT (1.8V, 4A) 47µF 2 EL7554 COMP SGND 28 220pF 0.018µF 2.32K 2 VREF COSC 27 0.018µ STN STP ...
Page 3
... FB_TC F Switching Frequency S I Feedback Input Pull-up Current FB 3 EL7554 = +25°C) Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C +0.3V Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C IN Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below +0.3V http://www.intersil.com/pbfree/Pb-FreeReflow.asp 3.3V +25° OSC CONDITIONS 0 < I < ...
Page 4
DC Electrical Specifications V PARAMETER DESCRIPTION V EN Input High Level EN_HI V EN Input Low Level EN_LO I Enable Pull-up Current EN TM, S Input High Level EL_HI TM, S Input Low Level EL_LO Pin Descriptions PIN NUMBER PIN ...
Page 5
Block Diagram V TJ JUNCTION TEMPERATURE V DD 2.2nF EN STP POWER TRACKING STN EA COMP SGND 5 EL7554 TM 0.018µF 220pF SEL V C REF OSC VOLTAGE OSCILLATOR REFERENCE PWM CONTROLLER DRIVERS CURRENT SENSE V ...
Page 6
Typical Performance Curves 3.3V 1.8V 4A 2.2µ =3.3V O 0.95 0.9 0.85 V =0.8V O 0.8 V = 0.7 ...
Page 7
Typical Performance Curves 3.3V 1.8V 4A 2.2µ 610 605 V =5V IN 600 595 590 V =3.3V IN 585 0 0 ...
Page 8
Waveforms 3.3V 1.8V 4A 2.2µ 0.5ms/DIV FIGURE 12. START-UP 50µs/DIV FIGURE 14. SHUT-DOWN 1ms/DIV FIGURE 16. VOLTAGE MARGINING 8 EL7554 = 2x10µ 47µF, ...
Page 9
Waveforms (Continued 3.3V 1.8V 4A 2.2µ 100µ 150µF OUT 2ms/DIV FIGURE 18. ADJUSTABLE START-UP Detailed Description The EL7554 is a ...
Page 10
V close The maximum achievable × – DSON1 O Where R is the DC resistance on the inductor and ...
Page 11
C 0.1µF STN - + STP 200K EL7554 V IN FIGURE 21. ADJUSTABLE START-UP In this application, C and C may be increased to IN OUT reduce input/output ripple because the pulse skipping nature of the method. ...
Page 12
ESR to satisfy the output ripple ΔV requirement: O ΔV ΔI × ESR = O L When output has a step load change ΔI drop is ESR*ΔI . Then V will drop even further before the ...
Page 13
... Thermal Management The EL7554IRE is packaged in a thermally-efficient HTSSOP-28 package, which utilizes the exposed thermal pad at the bottom to spread heat through PCB metal. Therefore: 1. The thermal pad must be soldered to the PCB 2. Maximize the PCB area multiple layer PCB is used, thermal vias ( mil) must be placed underneath the thermal pad to connect to ground plane(s) ...
Page 14
... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...