MT16HTF12864AY-53EB1 Micron Technology Inc, MT16HTF12864AY-53EB1 Datasheet - Page 12

MODULE DDR2 1GB 240-DIMM

MT16HTF12864AY-53EB1

Manufacturer Part Number
MT16HTF12864AY-53EB1
Description
MODULE DDR2 1GB 240-DIMM
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT16HTF12864AY-53EB1

Memory Type
DDR2 SDRAM
Memory Size
1GB
Speed
533MT/s
Package / Case
240-DIMM
Main Category
DRAM Module
Sub-category
DDR2 SDRAM
Module Type
240UDIMM
Device Core Size
64b
Organization
128Mx64
Total Density
1GByte
Chip Density
512Mb
Access Time (max)
50ps
Maximum Clock Rate
533MHz
Operating Supply Voltage (typ)
1.8V
Operating Current
1.216A
Number Of Elements
16
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
240
Mounting
Socket
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
I
Table 11: DDR2 I
Values shown for MT47H32M8 DDR2 SDRAM only and are computed from values specified in the 256Mb (32 Meg x 8)
component data sheet
PDF: 09005aef80f09084
htf16c64_128_256x64ay.pdf - Rev. G 3/10 EN
Parameter
Operating one bank active-precharge current:
(I
Address bus inputs are switching; Data bus inputs are switching
Operating one bank active-read-precharge current: I
= CL (I
t
puts are switching; Data pattern is same as I
Precharge power-down current: All device banks idle;
LOW; Other control and address bus inputs are stable; Data bus inputs are float-
ing
Precharge quiet standby current: All device banks idle;
is HIGH, S# is HIGH; Other control and address bus inputs are stable; Data bus
inputs are floating
Precharge standby current: All device banks idle;
HIGH, S# is HIGH; Other control and address bus inputs are switching; Data bus
inputs are switching
Active power-down current: All device banks open;
t
stable; Data bus inputs are floating
Active standby current: All device banks open;
MAX (I
Other control and address bus inputs are switching; Data bus inputs are switching
Operating burst write current: All device banks open; Continuous burst
writes; BL = 4, CL = CL (I
t
are switching; Data bus inputs are switching
Operating burst read current: All device banks open; Continuous burst read,
I
t
inputs are switching; Data bus inputs are switching
Burst refresh current:
interval; CKE is HIGH, S# is HIGH between valid commands; Other control and
address bus inputs are switching; Data bus inputs are switching
Self refresh current: CK and CK# at 0V; CKE ≤ 0.2V; Other control and ad-
dress bus inputs are floating; Data bus inputs are floating
DD
RCD (I
CK (I
RP (I
OUT
RP =
DD
),
= 0mA; BL = 4, CL = CL (I
DD
DD
Specifications
t
t
RAS =
DD
RP (I
DD
DD
); CKE is HIGH, S# is HIGH between valid commands; Address bus inputs
); CKE is LOW; Other control and address bus inputs are
), AL = 0;
); CKE is HIGH, S# is HIGH between valid commands; Address bus in-
),
DD
t
RP =
t
); CKE is HIGH, S# is HIGH between valid commands; Address bus
RAS MIN (I
t
RP (I
t
CK =
DD
DD
Specifications and Conditions – 512MB
DD
DD
t
t
); CKE is HIGH, S# is HIGH between valid commands;
CK (I
CK =
), AL = 0;
); CKE is HIGH, S# is HIGH between valid commands;
DD
DD
t
CK (I
), AL = 0;
),
t
RC =
DD
t
CK =
); REFRESH command at every
t
RC (I
t
CK =
t
CK (I
512MB, 1GB, 2GB, 4GB (x64, DR) 240-Pin DDR2 UDIMM
DD4W
DD
t
),
DD
CK (I
t
),
RAS =
t
CK =
t
t
RAS =
CK =
DD
t
CK =
),
t
t
CK =
t
t
RAS MIN (I
CK (I
RAS =
t
CK (I
t
OUT
t
CK =
t
RAS MAX (I
t
CK (I
CK =
12
DD
= 0mA; BL = 4, CL
DD
t
),
t
DD
RAS MAX (I
CK (I
),
Fast PDN exit
MR[12] = 0
Slow PDN exit
MR[12] = 1
t
t
CK (I
); CKE is
RAS =
t
DD
RC =
t
RFC (I
DD
),
DD
DD
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
); CKE is
RCD =
t
t
),
); CKE
RC
RAS
DD
t
RP =
DD
)
),
Symbol
I
I
I
I
I
I
I
DD4W
I
I
DD2Q
DD2N
DD3N
I
I
DD2P
DD3P
DD4R
DD0
DD1
DD5
DD6
1
1
2
2
2
2
1
2
2
2
1
-667
1560
1480
2880
760
840
640
640
480
800
80
96
80
© 2003 Micron Technology, Inc. All rights reserved.
I
DD
-53E
1320
1240
2720
680
760
560
560
400
640
80
96
80
Specifications
1040
2640
-40E
640
720
400
480
320
480
960
80
96
80
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA

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