MT16LSDT3264AG-133G3 Micron Technology Inc, MT16LSDT3264AG-133G3 Datasheet

no-image

MT16LSDT3264AG-133G3

Manufacturer Part Number
MT16LSDT3264AG-133G3
Description
MODULE SDRAM 256MB 168-DIMM
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT16LSDT3264AG-133G3

Memory Type
SDRAM
Memory Size
256MB
Speed
133MHz
Package / Case
168-DIMM
Main Category
DRAM Module
Sub-category
SDRAM
Module Type
168UDIMM
Device Core Size
64b
Organization
32Mx64
Total Density
256MByte
Chip Density
128Mb
Access Time (max)
6/5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Operating Current
1.216A
Number Of Elements
16
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Operating Temp Range
0C to 65C
Operating Temperature Classification
Commercial
Pin Count
168
Mounting
Socket
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
SYNCHRONOUS
DRAM MODULE
Features
• 168-pin, dual in-line memory module (DIMM)
• PC100- and PC133-compliant
• Utilizes 125 MHz and 133 MHz SDRAM
• Unbuffered
• 128MB (16 Meg x 64) and 256MB (32 Meg x 64)
• Single +3.3V power supply
• Fully synchronous; all signals registered on positive
• Internal pipelined operation; column address can
• Internal SDRAM banks for hiding row access/
• Programmable burst lengths: 1, 2, 4, 8, or full page
• Auto Precharge, includes CONCURRENT AUTO
• Self Refresh Mode: 64ms, 4,096-cycle refresh
• LVTTL-compatible inputs and outputs
• Serial Presence-Detect (SPD)
• Gold edge contacts
Table 1:
CL = CAS (READ) latency
Table 2:
09005aef80bccbe7
SD8_16C16_32x64AG.fm - Rev. E 12/05 EN
MODULE
MARKING
Refresh Count
Device Banks
Device Configuration
Row Addressing
Column Addressing
Module Ranks
components
edge of system clock
be changed every clock cycle
precharge
PRECHARGE and Auto Refresh Modes
(15.625µs refresh interval)
-13E
-133
-10E
FREQUENCY
133 MHz
133 MHz
100 MHz
CLOCK
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE.
Timing Parameters
Address Table
CL = 2
ACCESS TIME
5.4ns
9ns
CL = 3
5.4ns
7.5ns
SETUP
TIME
2ns
1.5
1.5
HOLD
TIME
1ns
0.8
0.8
128Mb (16 Meg x 8)
1
128MB (x64, SR), 256MB (x64, DR)
4 (BA0, BA1)
4K (A0–A11)
1K (A0–A9)
1 (S0#, S2#)
NOTE:
MT8LSDT1664A – 128MB
MT16LSDT3264A – 256MB
For the latest data sheet, please refer to the Micron
site:
Options
• Package
• Frequency/CAS Latency
• PCB
Standard 1.375in. (34.93mm)
Low Profile 1.125in. (28.58mm)
128MB
168-pin DIMM (standard)
168-pin DIMM (lead-free)
133 MHz/CL = 2
133 MHz/CL = 3
100 MHz/CL = 2
Standard 1.375in. (34.93mm)
Low-Profile 1.125in. (28.58mm)
4K
Figure 1: 168-Pin DIMM (MO-161)
www.micron.com/products/modules
1. Contact Micron for product availability.
168-PIN SDRAM UDIMM
©2003, 2004 Micron Technology, Inc. All rights reserved.
2 (S0#, S2#; S1#, S3#)
128Mb (16 Meg x 8)
4 (BA0, BA1)
4K (A0–A11)
1K (A0–A9)
1
256MB
4K
Marking
-13E
-10E
-133
Y
G
1
®
Web

Related parts for MT16LSDT3264AG-133G3

MT16LSDT3264AG-133G3 Summary of contents

Page 1

... PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE. 128MB (x64, SR), 256MB (x64, DR) MT8LSDT1664A – 128MB MT16LSDT3264A – 256MB For the latest data sheet, please refer to the Micron site: www.micron.com/products/modules Figure 1: 168-Pin DIMM (MO-161) Standard 1.375in. (34.93mm) Low Profile 1.125in. (28.58mm) Options • Package ...

Page 2

... MT16LSDT3264AG-133_ MT16LSDT3264AY-133_ MT16LSDT3264AG-10E_ MT16LSDT3264AY-10E_ NOTE: The designators for component and PCB revision are the last two characters of each part number Consult factory for cur- rent revision codes. Example: MT16LSDT3264AG-133B1. 09005aef80bccbe7 SD8_16C16_32x64AG.fm - Rev. E 12/05 EN 128MB (x64, SR), 256MB (x64, DR) MODULE DENSITY CONFIGURATION 128MB ...

Page 3

Table 4: Pin Assignment (168-Pin DIMM Front) PIN SYMBOL PIN SYMBOL PIN SYMBOL PIN SYMBOL DQ0 DQ1 DQ2 DQ3 26 ...

Page 4

... BA0: SDRAMs BA0 BA1: SDRAMs BA1 NOTE: 1. All resistor values are 10Ω unless otherwise specified. 2. Per industry standard, Micron modules utilize various component speed grades, as referenced in the module part numbering guide at www.micron.com/numberguide. 09005aef80bccbe7 SD8_16C16_32x64AG.fm - Rev. E 12/05 EN 128MB (x64, SR), 256MB (x64, DR) ...

Page 5

... DD V SDRAMs U1-U4; U6-U9; U11-U14; U16-U19 SS NOTE: 1. All resistor values are 10Ω unless otherwise specified. 2. Per industry standard, Micron modules utilize various component speed grades, as referenced in the module part numbering guide at www.micron.com/numberguide. 09005aef80bccbe7 SD8_16C16_32x64AG.fm - Rev. E 12/05 EN 128MB (x64, SR), 256MB (x64, DR) ...

Page 6

Table 6: Pin Descriptions Pin numbers may not correlate with symbols; refer to Pin Assignment tables on page 3 for more information PIN NUMBERS SYMBOL 27, 115, 111 RAS#, CAS#, WE# 42, 79, 125, 163 CK0–CK3 63, 128 CKE0, CKE1 ...

Page 7

Table 6: Pin Descriptions Pin numbers may not correlate with symbols; refer to Pin Assignment tables on page 3 for more information PIN NUMBERS SYMBOL 1, 12, 23, 32, 43, V Supply SS 54, 64, 68, 78, 85, 96, 107, ...

Page 8

... General Description The MT8LSDT1664A and MT16LSDT3264A are high-speed CMOS, dynamic random-access, 128MB and 256MB memory modules organized in a x64 con- figuration. These modules use internally configured quad-bank SDRAMs with a synchronous interface (all signals are registered on the positive edge of the clock signals CK). ...

Page 9

Mode register bits M0–M2 specify the burst length, M3 specifies the type of burst (sequential or inter- leaved), M4–M6 specify the CAS latency, M7 and M8 specify the operating mode, M9 specifies the write burst mode, and M10 and M11 ...

Page 10

Table 7: Burst Definition ORDER OF ACCESSES WITHIN A BURST ADDRESS BURST STARTING TYPE = LENGTH COLUMN SEQUENTIAL 0 0-1-2 1-2-3 2-3-0 3-0-1-2 A2 ...

Page 11

Test modes and reserved states should not be used because unknown operation or incompatibility with future versions may result. Write Burst Mode When the burst length programmed via M0- M2 applies to both read and write bursts; ...

Page 12

Commands Table 9, SDRAM Commands and DQMB Operation Truth Table provides a quick reference of available commands. This is followed by a written description of Table 9: SDRAM Commands and DQMB Operation Truth Table CKE is HIGH for all commands ...

Page 13

Absolute Maximum Ratings Stresses greater than those listed may cause perma- nent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the opera- ...

Page 14

Table 12: I Specifications and Conditions – 128MB DD Notes 11, 13; notes appear on page 18; V PARAMETER/CONDITION OPERATING CURRENT: Active Mode Burst = 2; READ or WRITE (MIN) STANDBY CURRENT: ...

Page 15

Table 14: Capacitance – 128MB PARAMETER Input Capacitance: Command and Address Input Capacitance: CK Input Capacitance: S# Input Capacitance: CKE Input Capacitance: DQMB Input/Output Capacitance: DQ Table 15: Capacitance – 256MB PARAMETER Input Capacitance: Command and Address Input Capacitance: CK ...

Page 16

Table 16: Electrical Characteristics and Recommended AC Operating Conditions Notes: 5–9, 11, 32; notes appear on page 18; module AC timing parameters comply with PC100 and PC133 design specs, based on component parameters AC CHARACTERISTICS PARAMETER Access time from CLK ...

Page 17

Table 17: AC Functional Characteristics (Notes 11, 32; notes appear following parameter tables) PARAMETER READ/WRITE command to READ/WRITE command CKE to clock disable or power-down entry mode CKE to clock enable or power-down exit setup ...

Page 18

Notes 1. All voltages referenced to Vss. 2. This parameter is sampled MHz 25°C; pin under test biased at 1.4V. 3. Idd is dependent on output loading and cycle rates. Specified values are obtained ...

Page 19

SPD Clock and Data Conventions Data states on the SDA line can change only during SCL LOW. SDA state changes during SCL HIGH are reserved for indicating start and stop conditions (as shown in Figure 7, Data Validity, and Figure ...

Page 20

Table 18: EEPROM Device Select Code Most significant bit (b7) is sent first SELECT CODE Memory Area Select Code (two arrays) Protection Register Select Code Table 19: EEPROM Operating Modes MODE RW BIT Current Address Read 1 Random Address Read ...

Page 21

Table 20: Serial Presence-Detect EEPROM DC Operating Conditions All voltages referenced DDSPD PARAMETER/CONDITION SUPPLY VOLTAGE INPUT HIGH VOLTAGE: Logic 1; All inputs INPUT LOW VOLTAGE: Logic 0; All inputs OUTPUT LOW VOLTAGE 3mA ...

Page 22

... AC, (CAS Latency = 6 (-133/-10E) t AC, (CAS Latency = t 15 (-13E (-133/-10E) 14 (-13E) t RRD 15 (-133) 20 (-10E (-13E) RCD 20 (-133/-10E) 45 (-13E) t RAS (See note 1) 44 (-133) 50 (-10E) 128MB 1.5 (-13E/-133 (-10E) 22 168-PIN SDRAM UDIMM MT8LSDT1664AG MT16LSDT3264AG ...

Page 23

... DS 2 (-10E) 0.8 (-13E/-133) 1 (-10E) t 60ns (-13E) RC 66ns (-133) 70ns (-10E) REV.2.0 (-13E) (-133) (-10E) MICRON 00–12 0 100 MHz (-13E/-133, -10E 168-PIN SDRAM UDIMM MT8LSDT1664AG MT16LSDT3264AG 00–0C Variable Data Variable Data 00 Variable Data Variable Data Variable Data ...

Page 24

Figure 11: 168-Pin DIMM Dimensions – 128MB 0.079 (2.00) R (2X 0.118 (3.00) (2X) 0.118 (3.00) TYP 0.250 (6.35) TYP 0.118 (3.00) TYP 2.625 (66.68) PIN 1 (PIN 85 ON BACKSIDE) 0.079 (2.00) R (2X 0.118 ...

Page 25

Figure 12: 168-Pin DIMM Dimensions – 256MB 0.079 (2.00 (2X) 0.118 (3.00) (2X) 0.118 (3.00) TYP 0.118 (3.00) TYP 2.625 (66.68) PIN 1 U11 U12 PIN 168 0.079 (2.00) R (2X 0.118 (3.00) (2X) 0.118 ...

Page 26

Data Sheet Designation Released (No Mark): This data sheet contains mini- mum and maximum limits specified over the complete power supply and temperature range for production 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 E-mail: prodmktg@micron.com, ...

Related keywords