MT16LSDT3264AG-13EG3 Micron Technology Inc, MT16LSDT3264AG-13EG3 Datasheet - Page 12

• Manufacturer Part Number: MT16LSDT3264AG-13EG3
• Description: MODULE SDRAM 256MB 168-DIMM
• Manufacturer: Micron Technology Inc

Specifications of MT16LSDT3264AG-13EG3

• Memory Type: SDRAM
• Memory Size: 256MB
• Speed: 133MHz
• Package / Case: 168-DIMM
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Commands
Truth Table provides a quick reference of available
commands. This is followed by a written description of
Table 9:
CKE is HIGH for all commands shown except SELF REFRESH
NOTE:
09005aef80bccbe7
SD8_16C16_32x64AG.fm - Rev. E 12/05 EN
COMMAND INHIBIT (NOP)
NO OPERATION (NOP)
ACTIVE (Select bank and activate row)
READ (Select bank and column, and start READ burst)
WRITE (Select bank and column, and start WRITE burst)
BURST TERMINATE
PRECHARGE (Deactivate row in bank or banks)
AUTO refresh or Self Refresh (Enter self refresh mode)
LOAD MODE REGISTER
Write Enable/Output Enable
1. A0–A11provide device row address, and BA0, BA1 determine which device bank is made active.
2. A0–A9 provide device column address; A10 HIGH enables the auto precharge feature (nonpersistent), while A10 LOW
3. A10 LOW: BA0, BA1 determine which device bank is being precharged. A10 HIGH: all device banks are precharged and
4. This command is AUTO REFRESH if CKE is HIGH, SELF REFRESH if CKE is LOW.
5. Internal refresh counter controls row addressing; all inputs and I/Os are “Don’t Care” except for CKE.
6. A0–A11 define the op-code written to the mode register.
7. Activates or deactivates the DQs during WRITEs (zero-clock delay) and READs (two-clock delay).
Table 9, SDRAM Commands and DQMB Operation
disables the auto precharge feature; BA0, BA1 determine which device bank is being read from or written to.
BA0, BA1 are “Don’t Care.”
SDRAM Commands and DQMB Operation Truth Table
NAME (FUNCTION)
CS#
H
L
L
L
L
L
L
L
–
12
L
128MB (x64, SR), 256MB (x64, DR)
each command. For a more detailed description of
commands and operations refer to 128Mb component
data sheets.
RAS# CAS# WE# DQMB
H
H
H
H
X
L
L
L
L
–
Micron Technology, Inc., reserves the right to change products or specifications without notice.
X
H
H
H
H
L
L
L
L
–
168-PIN SDRAM UDIMM
X
H
H
H
H
L
L
L
L
–
L/H8
L/H8
X
X
X
X
X
X
X
L
©2003, 2004 Micron Technology, Inc. All rights reserved.
Bank/Row
Bank/Col
Bank/Col
Op-code
ADDR
Code
X
X
X
X
–
Active
Active
Valid
DQ
X
X
X
X
X
X
X
NOTES
4, 5
1
2
2
3
6
7