MT9VDDT3272G-335G3 Micron Technology Inc, MT9VDDT3272G-335G3 Datasheet - Page 10

• Manufacturer Part Number: MT9VDDT3272G-335G3
• Description: MODULE SDRAM DDR 256MB 184DIMM
• Manufacturer: Micron Technology Inc

Specifications of MT9VDDT3272G-335G3

• Memory Type: DDR SDRAM
• Memory Size: 256MB
• Speed: 333MT/s
• Package / Case: 184-DIMM
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 11:
PDF: 09005aef80e119b2/Source: 09005aef80e11976
DD9C16_32_64x72.fm - Rev. D 1/08 EN
Parameter/Condition
Operating one bank active-precharge current:
t
Address and control inputs changing once every two clock cycles
Operating one bank active-read-precharge current: BL = 2;
t
changing once per clock cycle
Precharge power-down standby current: All device banks idle; Power-
down mode;
Idle standby current: CS# = HIGH; All device banks idle;
CKE = HIGH; Address and other control inputs changing once per clock
cycle; V
Active power-down standby current: One device bank active; Power-
down mode;
Active standby current: CS# = HIGH; CKE = HIGH; One device bank
active;
changing twice per clock cycle; Address and other control inputs changing
once per clock cycle
Operating burst read current: BL = 2; Continuous burst reads; One
device bank active; Address and control inputs changing once per clock
cycle;
Operating burst write current: BL = 2; Continuous burst writes; One
device bank active; Address and control inputs changing once per clock
cycle;
cycle
Auto refresh current
Self refresh current: CKE ≤ 0.2V
Operating bank interleave read current: Four device bank
interleaving reads (BL = 4) with auto precharge;
(MIN); Address and control inputs change only during active READ or
WRITE commands
CK =
RC =
t
t
t
t
RC (MIN);
CK (MIN); DQ, DM, and DQS inputs changing once per clock cycle;
CK =
CK =
IN
t
RC =
= V
t
t
REF
CK (MIN); I
CK (MIN); DQ, DM, and DQS inputs changing twice per clock
t
t
t
RAS (MAX);
I
Values are shown for the MT46V32M8 DDR SDRAM only and are computed from values specified in the
256Mb (32 Meg x 8) component data sheet
CK =
CK =
DD
for DQ, DM, and DQS
t
CK =
Specifications and Conditions – 256MB
t
t
CK (MIN); CKE = LOW
CK (MIN); CKE = LOW
t
CK (MIN); I
OUT
t
CK =
= 0mA
128MB, 256MB, 512MB (x72, ECC, SR) 184-Pin DDR SDRAM RDIMM
t
CK (MIN); DQ, DM, and DQS inputs
OUT
= 0mA; Address and control inputs
t
RC =
t
RC =
t
t
t
REFC =
REFC = 7.8125µs
RC (MIN);
t
t
RC (MIN);
CK =
10
t
RFC (MIN)
t
CK (MIN);
t
CK =
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
CK
Symbol
I
I
I
I
I
I
I
DD
DD
DD
I
I
DD
DD
DD
I
I
I
DD
DD
DD
DD
DD
DD
4W
3N
5A
2P
3P
4R
2F
0
1
5
6
7
1,125
1,530
1,575
1,575
2,295
3,690
-335
450
270
540
36
54
36
Electrical Specifications
©2003 Micron Technology, Inc. All rights reserved
1,350
1,350
1,125
1,440
2,115
3,150
-262
405
225
450
36
54
36
2,115/
3,150/
-26A/
1,080
1,305
1,350
1,350
2,205
3,285
-265
225/
405
270
450
36
54
36
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA