MT16HTF12864AY-53ED1 Micron Technology Inc, MT16HTF12864AY-53ED1 Datasheet - Page 13

MODULE DDR2 1GB 240-DIMM

MT16HTF12864AY-53ED1

Manufacturer Part Number
MT16HTF12864AY-53ED1
Description
MODULE DDR2 1GB 240-DIMM
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT16HTF12864AY-53ED1

Memory Type
DDR2 SDRAM
Memory Size
1GB
Speed
533MT/s
Package / Case
240-DIMM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Serial Presence-Detect
SPD Clock and Data Conventions
SPD Start Condition
SPD Stop Condition
SPD Acknowledge
PDF: 09005aef80f09084/Source: 09005aef80f09068
HTF16C64_128_256x64AG.fm - Rev. D 5/06 EN
Data states on the SDA line can change only during SCL LOW. SDA state changes during
SCL HIGH are reserved for indicating start and stop conditions (Figures 4 and 5 on
page 14).
All commands are preceded by the start condition, which is a HIGH-to-LOW transition
of SDA when SCL is HIGH. The SPD device continuously monitors the SDA and SCL
lines for the start condition and will not respond to any command until this condition
has been met.
All communications are terminated by a stop condition, which is a LOW-to-HIGH tran-
sition of SDA when SCL is HIGH. The stop condition is also used to place the SPD device
into standby power mode.
Acknowledge is a software convention used to indicate successful data transfers. The
transmitting device, either master or slave, will release the bus after transmitting 8 bits.
During the ninth clock cycle, the receiver will pull the SDA line LOW to acknowledge that
it received the 8 bits of data (Figure 6 on page 14).
The SPD device will always respond with an acknowledge after recognition of a start
condition and its slave address. If both the device and a WRITE operation have been
selected, the SPD device will respond with an acknowledge after the receipt of each
subsequent 8-bit word. In the read mode the SPD device will transmit 8 bits of data,
release the SDA line and monitor the line for an acknowledge. If an acknowledge is
detected and no stop condition is generated by the master, the slave will continue to
transmit data. If an acknowledge is not detected, the slave will terminate further data
transmissions and await the stop condition to return to standby power mode.
512MB, 1GB, 2GB: (x64, DR) 240-Pin DDR2 SDRAM UDIMM
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
Serial Presence-Detect
©2003 Micron Technology, Inc. All rights reserved.

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