LTM4608EV#PBF Linear Technology, LTM4608EV#PBF Datasheet - Page 20

• Manufacturer Part Number: LTM4608EV#PBF
• Description: IC DC/DC UMODULE 8A 68-LGA
• Manufacturer: Linear Technology
• Series: µModuler
• Type: Point of Load (POL) Non-Isolatedr

Specifications of LTM4608EV#PBF

• Design Resources: LTM4608 Spice Model
• Output: 0.6 ~ 5 V
• Number Of Outputs: 1
• Power (watts): 40W
• Mounting Type: Surface Mount
• Voltage - Input: 2.7 ~ 5.5 V
• Package / Case: 68-LGA
• 1st Output: 0.6 ~ 5 VDC @ 8A
• Size / Dimension: 0.59" L x 0.35" W x 0.11" H (15mm x 9mm x 2.8mm)
• Power (watts) - Rated: 40W
• Operating Temperature: -40°C ~ 85°C
• Efficiency: 95%
• Dc To Dc Converter Type: Step Down
• Pin Count: 68
• Input Voltage: 5.5V
• Output Voltage: 0.6 to 5V
• Switching Freq: 1.7MHz
• Output Current: 8A
• Package Type: LGA
• Output Type: Adjustable
• Switching Regulator: Yes
• Load Regulation: 0.75%
• Line Regulation: 0.2%/V
• Mounting: Surface Mount
• Input Voltage (min): 2.375V
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• 3rd Output: -
• 2nd Output: -
• Lead Free Status / Rohs Status: Compliant

LTM4608
APPLICATIONS INFORMATION
Safety Considerations
The LTM4608 modules do not provide isolation from V
to V
fuse with a rating twice the maximum input current needs
to be provided to protect each unit from catastrophic failure.
Layout Checklist/Example
The high integration of LTM4608 makes the PCB board
layout very simple and easy. However, to optimize its
electrical and thermal performance, some layout consid-
erations are still necessary.
• Use large PCB copper areas for high current path,
20
including V
PCB conduction loss and thermal stress.
OUT
. There is no internal fuse. If required, a slow blow
IN
, GND and V
For easier board layout and PCB assembly due to increased
spacing between land grid pads, please refer to the LTM4608A.
OUT
. It helps to minimize the
C
GND
IN
C
V
IN
IN
Figure 17. Recommended PCB Layout
IN
GND
• Place high frequency ceramic input and output capaci-
• Place a dedicated power ground layer underneath the
• To minimize the via conduction loss and reduce module
• Do not put vias directly on the pads, unless they are
• Use a separated SGND ground copper area for com-
Figure 17 gives a good example of the recommended layout.
tors next to the V
high frequency noise.
unit.
thermal stress, use multiple vias for interconnection
between top layer and other power layers.
capped.
ponents connected to signal pins. Connect the SGND
to GND underneath the unit.
V
GND
C
C
C
4608 F17
OUT
OUT
OUT
OUT
IN
, GND and V
OUT
pins to minimize
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