MA330012 Microchip Technology, MA330012 Datasheet - Page 122

• Manufacturer Part Number: MA330012
• Description: MODULE DSPIC33 100P TO 84QFP
• Manufacturer: Microchip Technology

Specifications of MA330012

• Accessory Type: Plug-In Module (PIM) 80p - dsPIC33FJ256GP710
• Kit Contents: DsPIC33 GP 100P To 80P TQFP Plug-In Module
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Silicon Manufacturer: Microchip
• Core Architecture: DsPIC
• Core Sub-architecture: DsPIC33
• Silicon Core Number: DsPIC33F
• Silicon Family Name: DsPIC33FJxxGPxxx
• Rohs Compliant: Yes
• For Use With: DsPICDEM 80-Pin Starter Board (DM300019)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: dsPICDEM (DM300019)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC33F
REGISTER 6-21:
DS70165E-page 120
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-12
bit 11
bit 10-8
bit 7
bit 6-4
bit 3
bit 2-0
U-0
U-0
—
—
Unimplemented: Read as ‘0’
T4IP<2:0>: Timer4 Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
OC4IP<2:0>: Output Compare Channel 4 Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
OC3IP<2:0>: Output Compare Channel 3 Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
DMA2IP<2:0>: DMA Channel 2 Data Transfer Complete Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
•
•
•
001 = Interrupt is priority 1
000 = Interrupt source is disabled
R/W-1
R/W-1
IPC6: INTERRUPT PRIORITY CONTROL REGISTER 6
OC3IP<2:0>
W = Writable bit
‘1’ = Bit is set
T4IP<2:0>
R/W-0
R/W-0
R/W-0
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
R/W-1
R/W-1
© 2007 Microchip Technology Inc.
DMA2IP<2:0>
OC4IP<2:0>
x = Bit is unknown
R/W-0
R/W-0
R/W-0
R/W-0
bit 8
bit 0