MA330012 Microchip Technology, MA330012 Datasheet - Page 143

MODULE DSPIC33 100P TO 84QFP

MA330012

Manufacturer Part Number
MA330012
Description
MODULE DSPIC33 100P TO 84QFP
Manufacturer
Microchip Technology
Datasheets

Specifications of MA330012

Accessory Type
Plug-In Module (PIM) 80p - dsPIC33FJ256GP710
Kit Contents
DsPIC33 GP 100P To 80P TQFP Plug-In Module
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Silicon Manufacturer
Microchip
Core Architecture
DsPIC
Core Sub-architecture
DsPIC33
Silicon Core Number
DsPIC33F
Silicon Family Name
DsPIC33FJxxGPxxx
Rohs Compliant
Yes
For Use With
DsPICDEM 80-Pin Starter Board (DM300019)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
dsPICDEM (DM300019)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
REGISTER 7-2:
© 2007 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-7
bit 6-0
Note 1:
FORCE
R/W-0
U-0
2:
(1)
The FORCE bit cannot be cleared by the user. The FORCE bit is cleared by hardware when the forced
DMA transfer is complete.
Please see Table 6-1 for a complete listing of IRQ numbers for all interrupt sources.
FORCE: Force DMA Transfer bit
1 = Force a single DMA transfer (Manual mode)
0 = Automatic DMA transfer initiation by DMA request
Unimplemented: Read as ‘0’
IRQSEL<6:0>: DMA Peripheral IRQ Number Select bits
0000000-1111111 = DMAIRQ0-DMAIRQ127 selected to be Channel DMAREQ
IRQSEL6
R/W-0
U-0
DMAxREQ: DMA CHANNEL x IRQ SELECT REGISTER
(2)
W = Writable bit
‘1’ = Bit is set
IRQSEL5
R/W-0
U-0
(2)
IRQSEL4
R/W-0
(1)
U-0
Preliminary
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
IRQSEL3
U-0
U-0
(2)
(2)
IRQSEL2
U-0
U-0
(2)
x = Bit is unknown
IRQSEL1
dsPIC33F
R/W-0
U-0
DS70165E-page 141
(2)
IRQSEL0
R/W-0
U-0
bit 8
bit 0
(2)

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