SI5324-EVB Silicon Laboratories Inc, SI5324-EVB Datasheet - Page 18

no-image

SI5324-EVB

Manufacturer Part Number
SI5324-EVB
Description
BOARD EVALUATION SI5324
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI5324-EVB

Main Purpose
Timing, Clock Multiplier
Embedded
No
Utilized Ic / Part
SI5324
Primary Attributes
2 Inputs, 2 Outputs
Secondary Attributes
CML, CMOS, LVDS, LVPECL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Register
128
129
130
131
132
134
135
136
137
138
139
142
143
185
Si5324
47
48
55
18
RST_REG
D7
CKOUT_ALWAYS_ON
DIGHOLD-
VALID
ICAL
PARTNUM_RO[3:0]
D6
0
0
1
1
Table 3. CKOUT_ALWAYS_ON and SQ_ICAL Truth Table
LOS2_EN[0:0] LOS1_EN[0:0]
D5
SQ_ICAL
CLKIN2RATE[2:0]
0
1
0
1
Preliminary Rev. 0.3
D4
INDEPENDENTSKEW1[7:0]
INDEPENDENTSKEW2[7:0]
PARTNUM_RO[11:4]
NVM_REVID[7:0]
CKOUT OFF until after the first ICAL
CKOUT OFF until after the first successful
ICAL (i.e., when LOL is low)
CKOUT always ON, including during an ICAL
CKOUT always ON, including during an ICAL.
Use these settings to preserve output-to-output
skew
N32[15:8]
N32[7:0]
FOS2_FLG
D3
LOS2_FLG
FOS1_FLG
LOS2_INT
FOS2_INT
Results
D2
REVID_RO[3:0]
CK2_ACTV_REG CK1_ACTV_REG
CLKIN1RATE[2:0]
LOS2_EN [1:1]
LOS1_FLG
LOS1_INT
FOS1_INT
FOS2_EN
LOL_FLG
D1
LOS1_EN [1:1]
FASTLOCK
LOSX_FLG
LOSX_INT
FOS1_EN
LOL_INT
D0

Related parts for SI5324-EVB