SI5324-EVB Silicon Laboratories Inc, SI5324-EVB Datasheet - Page 25

no-image

SI5324-EVB

Manufacturer Part Number
SI5324-EVB
Description
BOARD EVALUATION SI5324
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI5324-EVB

Main Purpose
Timing, Clock Multiplier
Embedded
No
Utilized Ic / Part
SI5324
Primary Attributes
2 Inputs, 2 Outputs
Secondary Attributes
CML, CMOS, LVDS, LVPECL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Reset value = 0000 0000
Reset value = 1100 0000
Register 8.
Register 9.
Name
Name
Type
Type
7:6
5:4
3:0
7:3
2:0
Bit
Bit
Bit
Bit
HLOG_2 [1:0] HLOG_2 [1:0].
HLOG_1 [1:0] HLOG_1 [1:0].
HIST_AVG
Reserved
Reserved
Name
Name
D7
D7
[4:0]
HLOG_2[1:0]
R/W
00: Normal operation
01: Holds CKOUT2 output at static logic 0.
Entrance and exit from this state will occur without glitches or runt pulses.
10:Holds CKOUT2 output at static logic 1.
Entrance and exit from this state will occur without glitches or runt pulses.
11: Reserved
00: Normal operation
01: Holds CKOUT1 output at static logic 0.
Entrance and exit from this state will occur without glitches or runt pulses.
10: Holds CKOUT1 output at static logic 1.
Entrance and exit from this state will occur without glitches or runt pulses.
11: Reserved
Reserved.
HIST_AVG [4:0].
Selects amount of averaging time to be used in generating the history information for
Digital Hold.
Reserved.
D6
D6
HIST_AVG [4:0]
R/W
D5
D5
HLOG_1[1:0]
R/W
Preliminary Rev. 0.3
D4
D4
Function
Function
D3
D3
D2
D2
R
Reserved
R
Reserved
D1
D1
R
Si5324
D0
D0
R
25

Related parts for SI5324-EVB