SI5324-EVB Silicon Laboratories Inc, SI5324-EVB Datasheet - Page 22

• Manufacturer Part Number: SI5324-EVB
• Description: BOARD EVALUATION SI5324
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5324-EVB

• Main Purpose: Timing, Clock Multiplier
• Embedded: No
• Utilized Ic / Part: SI5324
• Primary Attributes: 2 Inputs, 2 Outputs
• Secondary Attributes: CML, CMOS, LVDS, LVPECL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Si5324
Reset value = 0001 0010
Reset value = 1110 1101
22
Register 4.
Register 5.
Name
Name
Type
Type
7:6
4:0
7:6
5:0
Bit
Bit
Bit
Bit
5
ICMOS [1:0]
AUTOSEL_
AUTOSEL_REG [1:0]
HIST_DEL
REG [1:0]
Reserved
Reserved
Name
Name
D7
D7
[4:0]
ICMOS [1:0]
R/W
R/W
AUTOSEL_REG [1:0]
Selects method of input clock selection to be used.
00: Manual (either register or pin controlled, see CKSEL_PIN)
01: Automatic Non-Revertive
10: Automatic Revertive
11: Reserved
Reserved.
HIST_DEL [4:0].
Selects amount of delay to be used in generating the history information used for Digital
Hold.
ICMOS [1:0].
When the output buffer is set to CMOS mode, these bits determine the output buffer drive
strength. The first number below refers to 3.3 V operation; the second to 1.8 V operation.
These values assume CKOUT+ is tied to CKOUT-.
00: 8mA/2mA.
01: 16mA/4mA
10: 24mA/6mA
11: 32mA/8mA
Reserved.
D6
D6
Reserved
D5
D5
R
.
Preliminary Rev. 0.3
D4
D4
Function
Function
D3
D3
Reserved
HIST_DEL [4:0]
R
R/W
D2
D2
D1
D1
D0
D0