HW-SD1800A-DSP-SB-UNI-G Xilinx Inc, HW-SD1800A-DSP-SB-UNI-G Datasheet - Page 10

• Manufacturer Part Number: HW-SD1800A-DSP-SB-UNI-G
• Description: KIT DEVELOPMENT SPARTAN 3ADSP
• Manufacturer: Xilinx Inc
• Series: Spartan™-3A DSPr
• Type: DSPr

Specifications of HW-SD1800A-DSP-SB-UNI-G

• Contents: Development Platform, Power Supply and software
• Silicon Manufacturer: Xilinx
• Features: 10/100/1000 PHY, JTAG Programming And Configuration Port
• Silicon Family Name: Spartan-3A
• Silicon Core Number: 3SD1800A-FG676
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: Spartan 3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 122-1574; HW-SD1800A-DSP-DB-UNI-G; HW-SD1800A-DSP-DB-UNI-G; HW-SD1800A-DSP-SB-UNI-G

Functional Description
34
Figure 3
X-Ref Target - Figure 3
The following guidelines were used in the design of the DDR2 interface to the Spartan-3A
DSP FPGA. These guidelines are based on Micron recommendations and board level
simulation. Ideal impedance values are listed. Actual values may vary.
•
•
•
•
•
Memory clocks routed differentially
50-ohm controlled trace impedance
24-ohm series termination on bidirectional signals at the FPGA
Parallel termination following the memory device connection on all signals
60-ohm pull-up resistor to the termination supply (0.9V) on data and strobe signals at
the FPGA
3A DSP
Spartan
FPGA
shows terminator locations relative to the FPGA and the DDR2 memory devices.
www.xilinx.com
Series Terminations Near FPGA
Control (RAS#, CAS#,
WE#, BS0, BS1, CS#)
Figure 3: DDR2 SDRAM Interface
Series Terminations Near FPGA
Control (CKE)
Data [31:16]
Data [15:0]
Addr [13:0]
UDQS0_p
UDQS0_n
UDQS1_p
UDQS1_n
Stub Termination Near FPGA
LDQS1_n
LDQS1_p
LDQS0_n
LDQS0_p
CLK0_n
CLK0_p
CLK1_p
CLK1_n
UDM0
UDM1
LDM0
LDM1
Stub Terminations Near FPGA
Stub terminations are not necessary on the DM
traces because they are unidirectional signals.
Stub terminations are not necessary on the DM
traces because they are unidirectional signals.
Spartan-3A DSP Starter Platform User Guide
DDR2 SDRAM
DDR2 SDRAM
32M x 16
32M x 16
(64MB)
(64MB)
UG454 (v1.1) January 30, 2009
Stub Terminations
at Split points
UG454_03_050908
R