HW-SD1800A-DSP-SB-UNI-G Xilinx Inc, HW-SD1800A-DSP-SB-UNI-G Datasheet - Page 20

• Manufacturer Part Number: HW-SD1800A-DSP-SB-UNI-G
• Description: KIT DEVELOPMENT SPARTAN 3ADSP
• Manufacturer: Xilinx Inc
• Series: Spartan™-3A DSPr
• Type: DSPr

Specifications of HW-SD1800A-DSP-SB-UNI-G

• Contents: Development Platform, Power Supply and software
• Silicon Manufacturer: Xilinx
• Features: 10/100/1000 PHY, JTAG Programming And Configuration Port
• Silicon Family Name: Spartan-3A
• Silicon Core Number: 3SD1800A-FG676
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: Spartan 3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 122-1574; HW-SD1800A-DSP-DB-UNI-G; HW-SD1800A-DSP-DB-UNI-G; HW-SD1800A-DSP-SB-UNI-G

Functional Description
44
Debug Connector (This is not a Serial ATA Connector)
Table 11: Digilent Header Connections
For Digilent modules, see:
http://www.digilentinc.com/Products/Catalog.cfm?Nav1=Products&Nav2=Peripheral
&Cat=Peripheral.
X-Ref Target - Figure 6
A Serial ATA connector (J3) provides a high-speed interface for use as a serial debug port
(not Serial ATA), but may be used as a general-purpose communication interface. Two 3.3V
LVDS differential pairs, nominally one transmit pair (DBG_Tx_p/DBG_Tx_n) and one
receive pair (DBG_Rx_p/DBG_Rx_n), provide this high-speed communication channel.
Common-mode of the transmit pair is set to 1.25V by resistor R11 to 3.3V and resistor R8 to
Ground. 100-ohm differential termination of the receive pair is provided by resistor R10.
Nominal trace impedance is 50-ohms, with 49.9-ohm series resistors placed close to the
FPGA.
Table 12: Debug Connector (J3)
J3 Pin Number
J6 Signal
DIGI2_1
DIGI2_2
DIGI2_3
DIGI2_4
Table 12
1
2
3
identifies the connection of the J3 signals to the FPGA.
J7
J6
www.xilinx.com
Figure 6: Digilent Header Pinout
FPGA Pin
K19
K18
G22
F22
Signal Name
DBG_Tx_n
DBG_Tx_p
GND
Spartan-3A DSP Starter Platform User Guide
J7 Signal
DIGI1_1
DIGI1_2
DIGI1_3
DIGI1_4
UG454_06_050908
UG454 (v1.1) January 30, 2009
FPGA Pin
FPGA Pin
D26
E26
L18
L17
E24
F23
—
R