ISL12029 Intersil Corporation, ISL12029 Datasheet

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... Real Time Clock/Calendar with EEPROM The ISL12029 device is a low power real time clock with clock/calender, power-fail indicator, clock output and crystal compensation, two periodic or polled alarms (open drain output), intelligent battery backup switching, CPU Supervisor, integrated 512 x 8 bit EEPROM configured in 16 byte per page ...

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... ISL12029IBAZ 12029IBAZ ISL12029IV27Z 12029IV27Z ISL12029IV27AZ 1202927AZ ISL12029IV30AZ 1202930AZ ISL12029IVZ 12029IVZ ISL12029IVAZ 12029IVAZ NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Add “ ...

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... Power Supply 10, N.C. No Internal Connection ISL12029 supply fails. This pin should be tied to ground if not used. DESCRIPTION threshold open drain active LOW output. TRIP supplies power to the device in the event that the BAT FN6206.4 April 17, 2006 ...

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... Negative Slew Rate DD SR- DD IRQ/F RESET OUTPUTS OUT, V Output Low Voltage OL I Output Leakage Current LO 4 ISL12029 Thermal Information Pins Thermal Resistance (Note) OUT Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Lead Temperature (Soldering, 10s 300°C Unless otherwise noted +2.7V to +5.5V 3.3V DD ...

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... PURST V Minimum VDD for Valid RESET RVALID Output V ISL12029-4.5A Reset Voltage Level RESET ISL12029 Reset Voltage Level ISL12029-3 Reset Voltage Level ISL12029-2.7A Reset Voltage Level ISL12029-2.7 Reset Voltage Level t Watchdog Timer Period WDO t Watchdog Timer Reset Time-Out RST Delay Interface Minimum Restart Time ...

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... Write by the user the time from valid STOP condition at the end of Write WC sequence of a serial interface Write operation, to the end of the self-timed internal non-volatile write cycle. 6 ISL12029 (Continued) CONDITIONS Measured at the 70 crossing ...

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... SCL t SU:STA SDA (INPUT TIMING) SDA (OUTPUT TIMING) SCL 8TH BIT OF LAST BYTE SDA SCL SDA RESET START V RESET RESET 7 ISL12029 HIGH LOW t SU:DAT t HD:DAT t HD:STA FIGURE 1. BUS TIMING ACK CONDITION FIGURE 2. WRITE CYCLE TIMING t RSP t >t t <t ...

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... Vbat (V) FIGURE BAT 5.00 4.50 Vdd=5.5V 4.00 3.50 3.00 2.50 2.00 1.50 1.00 0.50 0.00 -45 -35 -25 - Temperature FIGURE TEMPERATURE DD3 4.50 4.00 3.50 3.00 2.50 2.00 1.50 1.00 0.50 0.00 1.8 2.3 2.8 3.3 Vdd (V) FIGURE ISL12029 Temperature is 25°C unless otherwise specified BSW = 3.8 4.3 4.8 5.3 SBIB = 0 BAT, Vdd=3. 3.8 4.3 4.8 5 DD3 DD 0.90 0.80 0.70 SCL,SDA pullups = 0V BSW = 0.60 0.50 0.40 0.30 0.20 0.10 0.00 1.80 2.30 2.80 3.30 3.80 4.30 Vbat(V) FIGURE ...

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... The X1 and X2 pins are the input and output, respectively inverting amplifier. An external 32.768kHz quartz crystal is used with the ISL12029 to supply a timebase for the real time clock. Internal compensation circuitry provides high accuracy over the operating temperature range from -40°C to +85°C. ...

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... The RTC has leap-year correction. The clock also corrects for months having fewer than 31 days and has a bit that controls 24 hour or AM/PM format. When the ISL12029 powers up after the loss of both V and V DD operate until at least one byte is written to the clock register ...

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... RTCF: Real Time Clock Fail Bit This bit is set to a “1” after a total power failure. This is a read only bit that is set by hardware (ISL12029 internally) when the device powers up after having lost all power to the device (both V regardless of whether V of only one of the supplies does not set the RTCF bit to “ ...

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... RTC registers. As the RTC advances, the alarm will be triggered once a match occurs between the alarm registers and the RTC registers. Any one alarm register, multiple registers, or all registers can be 12 ISL12029 according to the product variation, see device ordering information ...

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... Alarm output ( ISL12029 Oscillator Compensation Registers There are two trimming options. - ATR. Analog Trimming Register - DTR. Digital Trimming Register ARRAY LOCK These registers are non-volatile. The combination of analog None and digital trimming can give up to -64 to +110 ppm of total adjustment ...

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... C Communications During Battery backup and LVR Operation” in the Applications section for important details. VTS2, VTS1, VTS0: V RESET The ISL12029 is shipped with a default per the ordering information table. This register is RESET a nonvolatile with no protection, therefore any writes to this location can change the default value from that marked on the package ...

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... Condition 1: OUT - Condition 2: • Battery Backup Mode (V OUT The ISL12029 device will switch from the V when one of the following conditions occurs: - Condition 1: - Condition 2: There are two discrete situations that are possible when using Standard Mode: These two power control situations are illustrated in Figures 13 and 14 ...

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... BAT DD VOLTAGE ON IN Power-on Reset Application of power to the ISL12029 activates a Power-on Reset Circuit that pulls the RESET pin active. This signal provides several benefits prevents the system microprocessor from starting to operate with insufficient voltage prevents the processor from operating prior to stabilization of the oscillator. ...

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... SDA and SCL lines for the start condition and will not respond to any command until this condition has been met. See Figure 17. SCL SDA SCL SDA 17 ISL12029 line versus a preset threshold remains below DD , the completion of an in- DATA STABLE DATA CHANGE FIGURE 16 ...

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... The last bit of the Slave Address Byte defines the operation to be performed. When this R/W bit is a one, then a read operation is selected. A zero selects a write operation. Refer to Figure 19. After loading the entire Slave Address Byte from the SDA bus, the ISL12029 compares the device identifier and device DEVICE IDENTIFIER Array 1 1 ...

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... ISL12029 will not initiate an internal write cycle, and will continue to ACK commands. PAGE WRITE The ISL12029 has a page write operation initiated in the same manner as the byte write operation; but instead of terminating the write cycle after the first data byte is ...

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... To do this, the master issues a start condition followed by the Memory Array Slave Address Byte for a write or read operation (AEh or AFh). If the ISL12029 is still busy with the nonvolatile write cycle then no ACK will be returned. When the ISL12029 has completed the write operation, an ACK is returned and the host can proceed with the read or write operation ...

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... In a similar operation called “Set Current Address,” the device sets the address if a stop is issued instead of the second start shown in Figure 25. The ISL12029 then goes into standby mode after the stop and all bus activity will be ignored until a start is detected. This operation loads the new NO address into the address counter ...

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... For an Epson MC-405 device, for example, the turnover temperature is typically 25°C, and a peak drift of >110ppm occurs at the temperature extremes of PARAMETER Frequency Frequency Tolerance Turnover Temperature Operating Temperature Range Parallel Load Capacitance Equivalent Series Resistance 22 ISL12029 SLAVE A C ADDRESS DATA DATA ...

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... RTC. Care needs to be taken in layout of the RTC circuit to avoid noise pickup. Figure 27 shows a suggested layout for the ISL12029 or ISL12028 devices. XTAL1 32.768kGz FIGURE 27. SUGGESTED LAYOUT FOR INTERSIL RTC IN ...

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... V CC back V SS FIGURE 28. SUPERCAPACITOR CHARGING CIRCUIT 24 ISL12029 2 I LVR Operation Operation in Battery Backup mode and LVR is affected by the BSW and SBIB bits as described earlier. These bits allow flexible operation of the serial bus and EEPROM in battery backup mode, but certain operational details need to be clear before utilizing the different modes ...

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... TRIP Legacy Mode (2.63V) RESET V TRIP (2.2V) RESET I BAT RESET V TRIP (2.2V) RESET I BAT 25 ISL12029 2 VBAT I C ACTIVE IN EE PROM WRITE/ BATTERY READ IN BATTERY VOLTAGE BACKUP? BACKUP 2.2V typ YES, only if YES V < >V DD BAT BAT RESET 2.2V typ NO ...

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... Date disabled MOA0 00h Month disabled DWA0 00h Day of week disabled 26 ISL12029 B. Set the Interrupt register as follows: CONTROL REGISTER INT XX indicate other control bits Once the registers are set, the following waveform will be ...

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... Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 27 ISL12029 0.25(0.010 ...

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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 28 ISL12029 0.25(0.010 ...