isl97652 Intersil Corporation, isl97652 Datasheet
isl97652
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isl97652 Summary of contents
Page 1
... ISL97652IRZ - 7x7 QFN L48.7x7 ISL97652IRZ-T* ISL97652IRZ - 7x7 QFN L48.7x7 ISL97652IRZ-TK* ISL97652IRZ - 7x7 QFN L48.7x7 *Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials ...
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... BOOST EFF Peak Efficiency BOOST r Switch On Resistance DS(ON) 2 ISL97652 Thermal Information = +25°C) Thermal Resistance 7x7 QFN Package (Notes Maximum Junction Temperature (Plastic Package +150°C Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C Power Dissipation ≤ +25° .3.7W ...
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... Buck Maximum Duty Cycle Dmin_buck Buck Minimum Duty Cycle NEGATIVE (V ) CHARGE PUMP OFF V V Output Voltage Range OFF OFF ILoad_NCP_min External Load Driving Capability 3 ISL97652 = V = 15V 25V, V BOOST SUP ON CONDITIONS 12V see “Typical Performance Curves” on page 6 100mA to 500mA, see “Typical Performance Curves” ...
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... I Supply Current per amplifier SAMP V Offset Voltage OS I Noninverting Input Bias Current per amplifier B CMIR Common Mode Input Voltage Range 4 ISL97652 = V = 15V 25V -8V, over temperature from -40°C to +85°C, unless BOOST SUP ON OFF CONDITIONS I(DRVN) = +60mA I(DRVN) = -60mA V(DRVN V(SUP) - 0.5V V(DRVN) = 0.36V to V(VSUP) V(FBN) < ...
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... SS, SSB Voltage to Give Max Current Limit SSTH2 SS, SSB Voltage to Enable Fault Checking DELTH1 DEL1, DEL2 Voltage to Give Max Current Limit DELTH2 DEL1, DEL2 Voltage to Enable Fault Checking 5 ISL97652 = V = 15V 25V -8V, over temperature from -40°C to +85°C, unless BOOST SUP ON OFF CONDITIONS ...
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... I (mA) OUT FIGURE 3. BOOST LOAD REGULATION @ 650kHz 0.09 0.08 0.07 0.06 0.05 0. 1.3MHz 0.03 0.02 0.01 0. (V) IN FIGURE 5. BOOST LINE REGULATION 6 ISL97652 TO 14V V IN OUT TO 14V V OUT 1500 2000 0.20 0.15 0.10 0.05 0.00 TO 14V V IN OUT -0.05 -0.10 1500 2000 fs = 650kHz FIGURE 6. BOOST TRANSIENT RESPONSE @ 650kHz ...
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... V IN -0.1 -0.15 -0.2 12V OUT -0.25 -0.3 13V -0.35 -0.4 0 500 1000 1500 I (mA) OUT FIGURE 11. BUCK LOAD REGULATION @ 1.3MHz 7 ISL97652 (Continued) 100 -0.05 -0. OUT -0.25 -0.35 2000 2500 TO 3.3V V OUT OUT 2000 2500 FIGURE 12. BUCK TRANSIENT RESPONSE @ 650kHz ...
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... LOGIC (AC COUPLED) FIGURE 13. BUCK TRANSIENT RESPONSE @ 1.3MHz 0.2 0.15 0.1 0.05 0 -0.05 -0.1 -0.15 -0 (mA) OUT FIGURE 15. V LOAD REGULATION OFF INPUT SIGNAL OUTPUT SIGNAL FIGURE 17. V RISING SLEW RATE COM 8 ISL97652 (Continued) 0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0 (mA) OUT FIGURE 14. V LOAD REGULATION ...
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... NEG2 45 POS2 46 OUT2 47 OGND 48 NEG1 9 ISL97652 Op-amp 1 non-inverting input Op-amp 1 output GPM lower supply pin GPM delay pin GPM control pin GPM enable pin GPM output voltage slope adjust pin GPM output voltage GPM higher supply pin Positive charge pump feedback voltage ...
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... AVIN POS1 + - NEG1 OGND OUT1 DLY1 BIAS AND DLY2 SEQUENCE CONTROL REF 5V PVIN2 REGULATOR VDC SLICE CIRCUIT VDPM VGH VGHM VGHL 10 ISL97652 VCB FBB REF OSC SLOPE COMPENSATION - ∑ + FOSC UVLO AND THERMAL PROTECTION VFLK AGND VC SS FREQ F/F OSC S Q ...
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... NOTE: Separate PGND and SGND planes must be used, see PCB layout procedure section. Applications Information The ISL97652 provides a complete power solution for TFT LCD applications. The system consists of one boost converter to generate A voltage for column drivers, one VDD ...
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... ISL97652 higher frequency option is selected. The minimum boost duty cycle of the ISL97652 is ~10% for 650kHz and ~20% for 1.3MHz. When the operating duty cycle is lower than the minimum duty cycle, the part will not switch in some cycles randomly, which will cause some LX pulses to be skipped. In ...
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... TDK 10µF/25V 1210 Murata Loop Compensation (Boost Converter) The boost converter of ISL97652 can be compensated network connected from V pin to ground and R = 10k RC network is used in the demo board higher resistor value can be used to lower the transient load ...
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... Should the circuit remain in current limit for more than 100µs with no such rise taking place the circuit will fault out. In this scenario, the PFET will immediately switch itself off and the rest of the ISL97652 will later fault out due to the boost voltage at A away. ...
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... TDK 100µF/6.3V 1206 Murata PI Loop Compensation (Buck Converter) The buck converter of ISL97652 can be compensated network connected from VCB pin to ground. C and R = 10k RC network is used in the demo board. The CB larger value resistor can lower the transient overshoot, however, at the expense of stability of the loop. ...
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... M1, M2 which drives external steering diodes Dx and Dx via a pump capacitor (CN) to generate the negative V supply. An internal comparator (A1) senses the feedback voltage on FBN and turns on M1 for a period up to half a CLK period to maintain V in regulated operation at (FBN) 0.5V. External feedback resistor R5 is referenced ISL97652 V VDC SUP C5 2.2nF FBP A1 1.265V M2 0.1µ ...
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... EN2 going high. This does have the disadvantage of lengthening the fault detection time of the VOFF charge pump under true fault conditions and it also lengthens the initial VOFF turn-on time. Another solution would be to supply SUP from Vmain as long as the magnitude of Vmain 17 ISL97652 V VDC SUP C2 820pF FBN 0 ...
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... VFLK, a current is passed into pin CE to charge an VGHM VGL VFLK 18 ISL97652 external capacitor to VREF. This creates a delay, equal to CE*21300. For example, the delay time is ~10 CE capacitor. At this point, VGHM begins to slew down from VGH to VGL. The slew current is equal to Isl = 300/(RE+5kΩ), and the dv/dt slew rate is Isl/Cload. ...
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... T . Temperature shut-down of the ON amplifiers is disabled if EN1 is disabled. The amplifiers integrated in to the ISL97652 feature high output current of 50mA minimum and high slew rate of 50V/µs. Both inputs and outputs have rail-to-rail capability. Start-Up Sequence Control The ISL97652 features extensive start-up sequence control options ...
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... SSB EN1 EN2 V TCON V OFF V MAIN DIODE VDD 20 ISL97652 The Gate pulse modulator is enabled when both of the following conditions are met: • VDPM is H • over 90% of it's target value. ON DLY2 DLY1 DIODE DIODE MAIN ...
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... T SSB EN1 DLY1 EN2 TCON V OFF V - DIODE IN V MAIN DIODE DIODE IN A VDD FIGURE 23. TIMING DIAGRAM 2 21 ISL97652 DLY2 DIODE MAIN FN9287.1 November 2, 2007 ...
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... Undervoltage Lockout The integrated undervoltage lockout circuit is designed to power down the TFT-LCD if the input voltage falls below a preset threshold. The ISL97652 will not start if the input voltage is below the UVLO threshold. Over-Temperature Protection An internal temperature sensor continuously monitors the die temperature. In the event that the die temperature exceeds the thermal trip point of +150° ...
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... VIAs) increases the effective high frequency ESR of the capacitors and WILL cause degraded system operation. 23 ISL97652 (Route the following tracks on the PGND (top) metal layer: PGND1,2,3 [a single wide track] to CIN, Cout and CB, D5. SW1,2 [a single wide track] to L1/D1, SWB1,2 [a single wide track] to L2/D5 ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 24 ISL97652 FN9287.1 November 2, 2007 ...
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... L48.7x7 48 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 4, 10/06 7.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 25 ISL97652 4X 5.5 A 44X 0. 48X 0 . 40± BOTTOM VIEW ± SIDE VIEW ( 44X REF C ( 48X 0 ...