ATMEGA48-20AU Atmel, ATMEGA48-20AU Datasheet - Page 286
ATMEGA48-20AU
Manufacturer Part Number
ATMEGA48-20AU
Description
IC AVR MCU 4K 20MHZ 5V 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA48-20AU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
ATMEGA48x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
2-Wire/SPI/USART/Serial
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
512Byte
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
TQFP
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Manufacturer
Quantity
Price
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ATmega48/88/168
Table 27-5.
Note:
Table 27-6.
Notes:
Extended Fuse Byte
–
–
–
–
–
BOOTSZ1
BOOTSZ0
BOOTRST
High Fuse Byte
RSTDISBL
DWEN
SPIEN
WDTON
EESAVE
BODLEVEL2
BODLEVEL1
BODLEVEL0
(2)
1. The default value of BOOTSZ1..0 results in maximum Boot Size. See
1. See
2. The SPIEN Fuse is not accessible in serial programming mode.
3. See
4. See
(3)
289
(1)
(4)
(4)
(4)
Extended Fuse Byte for mega88/168
Fuse High Byte
for details.
“Alternate Functions of Port C” on page 80
“WDTCSR – Watchdog Timer Control Register” on page 52
Table 28-4 on page 306
Bit No
Bit No
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
for BODLEVEL Fuse decoding.
Description
–
–
–
–
–
Select Boot Size
(see
and
for details)
Select Boot Size
(see
and
for details)
Select Reset Vector
Description
External Reset Disable
debugWIRE Enable
Enable Serial Program and
Data Downloading
Watchdog Timer Always On
EEPROM memory is
preserved through the Chip
Erase
Brown-out Detector trigger
level
Brown-out Detector trigger
level
Brown-out Detector trigger
level
Table 26-9 on page 281
Table 26-9 on page 281
Table 26-6 on page 280
Table 26-6 on page 280
for description of RSTDISBL Fuse.
Default Value
1
1
1
1
1
0 (programmed)
0 (programmed)
1 (unprogrammed)
Default Value
1 (unprogrammed)
1 (unprogrammed)
0 (programmed, SPI
programming enabled)
1 (unprogrammed)
1 (unprogrammed), EEPROM
not reserved
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
for details.
Table 27-11 on page
2545S–AVR–07/10
(1)
(1)
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