DSPIC30F3012-30I/P Microchip Technology, DSPIC30F3012-30I/P Datasheet - Page 66

• Manufacturer Part Number: DSPIC30F3012-30I/P
• Description: IC DSPIC MCU/DSP 24K 18DIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F3012-30I/P

• Program Memory Type: FLASH
• Program Memory Size: 24KB (8K x 24)
• Package / Case: 18-DIP (0.300", 7.62mm)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 12
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 30 MHz
• Number Of Programmable I/os: 12
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC30F005 - MODULE SCKT DSPIC30F 18DIP/SOICDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLEACICE0202 - ADAPTER MPLABICE 18P 300 MIL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F3012-30IP

dsPIC30F2011/2012/3012/3013
8.1
The user-assignable interrupt priority bits (IP<2:0>) for
each individual interrupt source are located in the
LS 3 bits of each nibble within the IPCx register(s). Bit
3 of each nibble is not used and is read as a ‘0’. These
bits define the priority level assigned to a particular
interrupt by the user.
Natural Order Priority is determined by the position of
an interrupt in the vector table, and only affects
interrupt operation when multiple interrupts with the
same user-assigned priority become pending at the
same time.
Table 8-1
sources
devices and their associated vector numbers.
The ability for the user to assign every interrupt to one
of seven priority levels means that the user can assign
a very high overall priority level to an interrupt with a
low natural order priority. For example, the PLVD
(Low Voltage Detect) can be given a priority of 7. The
INT0 (External Interrupt 0) may be assigned to priority
level 1, thus giving it a very low effective priority.
DS70139G-page 66
Note:
Note 1: The natural order priority scheme has 0
2: The natural order priority number is the
Interrupt Priority
lists the interrupt numbers and interrupt
for
The user-assignable priority levels start at
0 as the lowest priority and level 7 as the
highest priority.
as the highest priority and 53 as the
lowest priority.
same as the INT number.
the
dsPIC30F2011/2012/3012/3013
TABLE 8-1:
Interrupt
Note 1:
Number
17-22
26-41
43-53
10
11
12
13
14
15
16
23
24
25
42
0
1
2
3
4
5
6
7
8
9
Only the dsPIC30F3013 has UART2 and
the U2RX, U2TX interrupts. These
locations are reserved for the
dsPIC30F2011/2012/3012.
Number
Highest Natural Order Priority
Vector
Lowest Natural Order Priority
25-30
34-49
51-61
10
12
13
14
15
16
17
18
19
20
21
22
23
24
31
32
33
50
11
8
9
INTERRUPT VECTOR TABLE
INT0 – External Interrupt 0
IC1 – Input Capture 1
OC1 – Output Compare 1
T1 – Timer 1
IC2 – Input Capture 2
OC2 – Output Compare 2
T2 – Timer2
T3 – Timer3
SPI1
U1RX – UART1 Receiver
U1TX – UART1 Transmitter
ADC – ADC Convert Done
NVM – NVM Write Complete
SI2C – I
MI2C – I
Input Change Interrupt
INT1 – External Interrupt 1
Reserved
INT2 – External Interrupt 2
U2RX
U2TX
Reserved
LVD – Low-Voltage Detect
Reserved
© 2010 Microchip Technology Inc.
(1)
(1)
Interrupt Source
2
2
– UART2 Transmitter
– UART2 Receiver
C™ Slave Interrupt
C Master Interrupt