PIC24HJ64GP506-I/PT Microchip Technology, PIC24HJ64GP506-I/PT Datasheet - Page 5

• Manufacturer Part Number: PIC24HJ64GP506-I/PT
• Description: IC PIC MCU FLASH 32KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ64GP506-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 64KB (22K x 24)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 18x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24HJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: 3-Wire/I2C/USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 13
• Operating Supply Voltage: 0 V to 2.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 18-ch x 12-bit
• Controller Family/series: PIC24
• No. Of I/o's: 53
• Ram Memory Size: 8KB
• Cpu Speed: 40MIPS
• No. Of Timers: 13
• Embedded Interface Type: CAN, I2C, SPI, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARDDM300024 - KIT DEMO DSPICDEM 1.1MA240012 - MODULE PLUG-IN PIC24H 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM300019 - BOARD DEMO DSPICDEM 80L STARTERDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 2:
© 2010 Microchip Technology Inc.
Note 1:
Module
ECAN
UART
ADC
SPI
SPI
I
I/O
2
C
Only those issues indicated in the last column apply to the current silicon revision.
Consumption
Sleep Mode
Generation
Operation
Character
SDO1 Pin
FRMDLY
Transmit
Feature
in Sleep
SILICON ISSUE SUMMARY (CONTINUED)
Current
Break
Slave
Mode
—
Number
Item
54.
55.
56.
57.
58.
59.
60.
The WAKIF bit in the CxINTF register cannot be cleared by
software instruction after the device has been interrupted from
Sleep by activity on the CAN bus.
After the ACKSTAT bit is set when receiving a NACK, it may
be cleared by the reception of a Start or Stop bit.
Writing to the SPIxBUF register as soon as TBF bit is cleared
will cause the SPI module to ignore written data.
The UART module will not generate back-to-back Break
characters.
The SDO1 pin may toggle while the device is being
programmed via PGECx/PGEDx pin pairs.
The SPI communication in Framed mode does not function
correctly if the Slave SPI frame delay bit (FRMDLY) is set to
‘1’.
If the ADC module is in an enabled state when the device
enters Sleep Mode, the power-down current (I
device may exceed the device data sheet specifications.
PIC24HJXXXGPX06/X08/X10
Issue Summary
PD
) of the
DS80444D-page 5
Revisions
A2 A3 A4
X
X
X
X
X
X
X
Affected
X
X
X
X
X
X
X
(1)
X
X
X
X
X
X
X