PIC24FJ128GA110-I/PT Microchip Technology, PIC24FJ128GA110-I/PT Datasheet - Page 221

IC PIC MCU FLASH 100TQFP

PIC24FJ128GA110-I/PT

Manufacturer Part Number
PIC24FJ128GA110-I/PT
Description
IC PIC MCU FLASH 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr

Specifications of PIC24FJ128GA110-I/PT

Core Size
16-Bit
Program Memory Size
128KB (43K x 24)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
85
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Controller Family/series
PIC24
No. Of I/o's
85
Ram Memory Size
16KB
Cpu Speed
32MHz
No. Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDMA240015 - BOARD MCV PIM FOR 24F256GADM240011 - KIT STARTER MPLAB FOR PIC24F MCU
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ128GA110-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC24FJ128GA110-I/PT
Manufacturer:
MICROCHIP
Quantity:
8 000
REGISTER 20-5:
REGISTER 20-6:
© 2008 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-2
bit 1
bit 0
PCFG15
PCFG7
R/W-0
R/W-0
U-0
U-0
PCFG15:PCFG0: Analog Input Pin Configuration Control bits
1 = Pin for corresponding analog channel is configured in Digital mode; I/O port read enabled
0 = Pin configured in Analog mode; I/O port read disabled, A/D samples pin voltage
Unimplemented: Read as ‘0’
PCFG17: A/D Input Band Gap Scan Enable bit
1 = Internal band gap (V
0 = Analog channel disabled from input scan
PCFG16: A/D Input Half Band Gap Scan Enable bit
1 = Internal V
0 = Analog channel disabled from input scan
PCFG14
PCFG6
R/W-0
R/W-0
U-0
U-0
AD1PCFGL: A/D PORT CONFIGURATION REGISTER (LOW)
AD1PCFGH: A/D PORT CONFIGURATION REGISTER (HIGH)
BG
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
/2 channel enabled for input scan
PCFG13
PCFG5
R/W-0
R/W-0
U-0
U-0
BG
) channel enabled for input scan
PCFG12
PIC24FJ256GA110 FAMILY
PCFG4
R/W-0
R/W-0
U-0
U-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PCFG11
PCFG3
R/W-0
R/W-0
U-0
U-0
PCFG10
PCFG2
R/W-0
R/W-0
U-0
U-0
x = Bit is unknown
x = Bit is unknown
PCFG17
PCFG9
PCFG1
R/W-0
R/W-0
R/W-0
U-0
DS39905B-page 219
PCFG16
PCFG0
PCFG8
R/W-0
R/W-0
R/W-0
U-0
bit 8
bit 0
bit 8
bit 0

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