PIC24FJ128GA110-I/PT Microchip Technology, PIC24FJ128GA110-I/PT Datasheet - Page 222

• Manufacturer Part Number: PIC24FJ128GA110-I/PT
• Description: IC PIC MCU FLASH 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ128GA110-I/PT

• Core Size: 16-Bit
• Program Memory Size: 128KB (43K x 24)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• Controller Family/series: PIC24
• No. Of I/o's: 85
• Ram Memory Size: 16KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARDMA240015 - BOARD MCV PIM FOR 24F256GADM240011 - KIT STARTER MPLAB FOR PIC24F MCU
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC24FJ256GA110 FAMILY
REGISTER 20-7:
REGISTER 20-8:
EQUATION 20-1:
DS39905B-page 220
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-2
bit 1
bit 0
CSSL15
CSSL7
R/W-0
R/W-0
U-0
U-0
—
—
CSSL15:CSSL0: A/D Input Pin Scan Selection bits
1 = Corresponding analog channel selected for input scan
0 = Analog channel omitted from input scan
Unimplemented: Read as ‘0’
CSSL17: A/D Input Band Gap Scan Selection bit
1 = Internal band gap (V
0 = Analog channel omitted from input scan
CSSL16: A/D Input Half Band Gap Scan Selection bit
1 = Internal V
0 = Analog channel omitted from input scan
CSSL14
CSSL6
R/W-0
R/W-0
U-0
U-0
—
—
AD1CSSL: A/D INPUT SCAN SELECT REGISTER (LOW)
AD1CSSH: A/D INPUT SCAN SELECT REGISTER (HIGH)
A/D CONVERSION CLOCK PERIOD
Note 1:
BG
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
/2 channel selected for input scan
CSSL13
CSSL5
R/W-0
R/W-0
Based on T
U-0
U-0
—
—
BG
) channel selected for input scan
CY
T
CSSL12
CSSL4
R/W-0
R/W-0
AD
= 2 * T
ADCS =
U-0
U-0
—
—
Preliminary
= T
CY
OSC
• (ADCS + 1)
; Doze mode and PLL are disabled.
T
T
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
AD
CY
CSSL11
CSSL3
R/W-0
R/W-0
U-0
U-0
(1)
– 1
—
—
CSSL10
CSSL2
R/W-0
R/W-0
U-0
U-0
—
—
© 2008 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
CSSL17
CSSL9
CSSL1
R/W-0
R/W-0
R/W-0
U-0
—
CSSL16
CSSL8
CSSL0
R/W-0
R/W-0
R/W-0
U-0
—
bit 8
bit 0
bit 8
bit 0