AT89C51ED2-SLSUM Atmel, AT89C51ED2-SLSUM Datasheet - Page 102
![IC 8051 MCU FLASH 64K 44PLCC](/photos/6/70/67043/453-44-plcc_sml.jpg)
AT89C51ED2-SLSUM
Manufacturer Part Number
AT89C51ED2-SLSUM
Description
IC 8051 MCU FLASH 64K 44PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet
1.ATWEBDVK-02RC.pdf
(137 pages)
Specifications of AT89C51ED2-SLSUM
Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Package
44PLCC
Device Core
8051
Family Name
89C
Maximum Speed
40 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
34
Interface Type
SPI/UART
Number Of Timers
3
Processor Series
AT89x
Core
8051
Data Ram Size
2 KB
Maximum Clock Frequency
40 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Cpu Family
AT89
Device Core Size
8b
Frequency (max)
40MHz
Total Internal Ram Size
2KB
# I/os (max)
34
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PLCC
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT89C51ED2-SLSUM
Manufacturer:
MITSUBISHI
Quantity:
43
Part Number:
AT89C51ED2-SLSUM
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
24.7
24.7.1
24.7.2
102
ISP Protocol Description
AT89C51RD2/ED2
Physical Layer
Frame Description
The UART used to transmit information has the following configuration:
The Serial Protocol is based on the Intel Hex-type records.
Intel Hex records consist of ASCII characters used to represent hexadecimal values and are
summarized below.
Figure 24-6. Intel Hex Type Frame
Record Mark is the start of frame. This field must contain ’:’.
Reclen specifies the number of bytes of information or data which follows the Record Type field
of the record.
Load Offset specifies the 16-bit starting load offset of the data bytes, therefore this field is used
only for Data Program Record (see Section “ISP Commands Summary”).
Record Type specifies the command type. This field is used to interpret the remaining informa-
tion within the frame. The encoding for all the current record types is described in Section “ISP
Commands Summary”.
Data/Info is a variable length field. It consists of zero or more bytes encoded as pairs of hexa-
decimal digits. The meaning of data depends on the Record Type.
The two’s complement of the 8-bit bytes that result from converting each pair of ASCII hexadec-
imal digits to one byte of binary, and including the Reclen field to and including the last byte of
the Data/Info field. Therefore, the sum of all the ASCII pairs in a record after converting to
binary, from the Reclen field to and including the Checksum field, is zero.
• Character: 8-bit data
• Parity: none
• Stop: 2 bits
• Flow control: none
• Baudrate: autobaud is performed by the bootloader to compute the baudrate chosen by the
• Record Mark:
• Reclen:
• Load Offset:
• Record Type:
• Data/Info:
• Checksum:
host.
Record
1-byte
Mark
’:’
Reclen
1-byte
2-bytes
Load
Offset
1-byte
Record
Type
n-bytes
Data
Info
or
Checksum
1-byte
4235K–8051–05/08