AT89C51ED2-SLSUM Atmel, AT89C51ED2-SLSUM Datasheet - Page 99
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AT89C51ED2-SLSUM
Manufacturer Part Number
AT89C51ED2-SLSUM
Description
IC 8051 MCU FLASH 64K 44PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet
1.ATWEBDVK-02RC.pdf
(137 pages)
Specifications of AT89C51ED2-SLSUM
Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Package
44PLCC
Device Core
8051
Family Name
89C
Maximum Speed
40 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
34
Interface Type
SPI/UART
Number Of Timers
3
Processor Series
AT89x
Core
8051
Data Ram Size
2 KB
Maximum Clock Frequency
40 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Cpu Family
AT89
Device Core Size
8b
Frequency (max)
40MHz
Total Internal Ram Size
2KB
# I/os (max)
34
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PLCC
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT89C51ED2-SLSUM
Manufacturer:
MITSUBISHI
Quantity:
43
Part Number:
AT89C51ED2-SLSUM
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
24.6.3
4235K–8051–05/08
Functional Description
Specific Protocol
External Host with
Communication
Figure 24-3. Bootloader Functional Description
On the above diagram, the on-chip bootloader processes are:
The purpose of this process is to manage the communication and its protocol between the on-
chip bootloader and a external device. The on-chip ROM implements a serial protocol (see sec-
tion “Bootloader Protocol”). This process translate serial communication frame (UART) into
Flash memory access (read, write, erase, etc.).
Several Application Program Interface (API) calls are available for use by an application pro-
gram to permit selective erasing and programming of Flash pages. All calls are made through a
common interface (API calls), included in the ROM bootloader. The programming functions are
selected by setting up the microcontroller’s registers before making a call to a common entry
point (0xFFF0). Results are returned in the registers. The purpose on this process is to translate
the registers values into internal Flash Memory Management.
This process manages low level access to Flash memory (performs read and write access).
• ISP Communication Management
• User Call Management
• Flash Memory Management
ISP Communication
Management
Flash Memory
Management
Memory
Flash
Management (API)
User Call
AT89C51RD2/ED2
Application
User
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