AT89C51ED2-SLSUM Atmel, AT89C51ED2-SLSUM Datasheet - Page 97
![IC 8051 MCU FLASH 64K 44PLCC](/photos/6/70/67043/453-44-plcc_sml.jpg)
AT89C51ED2-SLSUM
Manufacturer Part Number
AT89C51ED2-SLSUM
Description
IC 8051 MCU FLASH 64K 44PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet
1.ATWEBDVK-02RC.pdf
(137 pages)
Specifications of AT89C51ED2-SLSUM
Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Package
44PLCC
Device Core
8051
Family Name
89C
Maximum Speed
40 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
34
Interface Type
SPI/UART
Number Of Timers
3
Processor Series
AT89x
Core
8051
Data Ram Size
2 KB
Maximum Clock Frequency
40 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Cpu Family
AT89
Device Core Size
8b
Frequency (max)
40MHz
Total Internal Ram Size
2KB
# I/os (max)
34
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PLCC
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT89C51ED2-SLSUM
Manufacturer:
MITSUBISHI
Quantity:
43
Part Number:
AT89C51ED2-SLSUM
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
24.4
Figure 24-1. Flash Memory Possible Contents
24.5
24.6
24.6.1
4235K–8051–05/08
Flash Memory Status
Memory Organization
Bootloader Architecture
FFFFh
0000h
Introduction
Default
Virgin
Table 24-5.
Note:
AT89C51RD2/ED2 parts are delivered in standard with the ISP ROM bootloader.
After ISP or parallel programming, the possible contents of the Flash memory are summarized in
Figure 24-1:
When the EA pin is high, the processor fetches instructions from internal program Flash. If the
EA pin is tied low, all program memory fetches are from external memory.
The bootloader manages communication according to a specifically defined protocol to provide
the whole access and service on Flash memory. Furthermore, all accesses and routines can be
called from the user application.
Security
Level
Program Lock Bits
1
2
3
After ISP
Application
X: Do not care
WARNING: Security level 2 and 3 should only be programmed after Flash verification.
LB0
X
1
0
User Memory Lock Bits of the SSB
LB1
1
1
0
Dedicated
ISP
After ISP
Application
Virgin
Protection Description
No program lock features enabled.
ISP programming of the Flash is disabled.
Same as 2, also verify through ISP programming interface is disabled.
or
After Parallel
Programming
Application
After Parallel
Programming
Dedicated
ISP
Application
Virgin
AT89C51RD2/ED2
or
After Parallel
Programming
Application
Virgin
or
97