P87C660X2BBD,157 NXP Semiconductors, P87C660X2BBD,157 Datasheet - Page 46

• Manufacturer Part Number: P87C660X2BBD,157
• Description: IC 80C51 MCU 16K OTP 44-LQFP
• Manufacturer: NXP Semiconductors
• Series: 87Cr

Specifications of P87C660X2BBD,157

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-LQFP
• Processor Series: P87C6x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: I2C, UART
• Maximum Clock Frequency: 16 MHz, 33 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-3204; 935273061157; P87C660X2BBD

Philips Semiconductors
Table 9.
2003 Oct 02
STATUS
STATUS
(S1STA)
(S1STA)
CODE
80C51 8-bit microcontroller family
RAM, low voltage (2.7 to 5.5 V), low power, high speed (30/33
MHz), two 400KB I
08H
10H
18H
20H
28H
30H
38H
A START condition has
been transmitted
A repeated START
condition has been
transmitted
SLA+W has been
transmitted; ACK has
b
been received
SLA+W has been
transmitted; NOT ACK
h
has been received
Data byte in S1DAT has
been transmitted; ACK
h
has been received
Data byte in S1DAT has
been transmitted; NOT
ACK h
ACK has been received
Arbitration lost in
SLA+R/W or
D
Data bytes
Master Transmitter Mode
SIO1 HARDWARE
SIO1 HARDWARE
STATUS OF THE
STATUS OF THE
diti
b
b
I
b
2
C BUS AND
b
h
i
2
C interfaces
d
b
i
i
d
d
i
d
Load SLA+W
Load SLA+W or
Load SLA+R
Load data byte or
no S1DAT action or
no S1DAT action or
no S1DAT action
Load data byte or
no S1DAT action or
no S1DAT action or
no S1DAT action
Load data byte or
no S1DAT action or
no S1DAT action or
no S1DAT action
Load data byte or
no S1DAT action or
no S1DAT action or
no S1DAT action
No S1DAT action or
No S1DAT action
TO/FROM S1DAT
TO/FROM S1DAT
APPLICATION SOFTWARE RESPONSE
16 KB OTP/ROM, 512B
STA
X
X
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
TO S1CON
46
STO
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
SI
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AA
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
SLA+W will be transmitted;
ACK bit will be received
As above
SLA+W will be transmitted;
SIO1 will be switched to MST/REC mode
Data byte will be transmitted;
ACK bit will be received
Repeated START will be transmitted;
STOP condition will be transmitted;
STO flag will be reset
STOP condition followed by a
START condition will be transmitted;
STO flag will be reset
Data byte will be transmitted;
ACK bit will be received
Repeated START will be transmitted;
STOP condition will be transmitted;
STO flag will be reset
STOP condition followed by a
START condition will be transmitted;
STO flag will be reset
Data byte will be transmitted;
ACK bit will be received
Repeated START will be transmitted;
STOP condition will be transmitted;
STO flag will be reset
STOP condition followed by a
START condition will be transmitted;
STO flag will be reset
Data byte will be transmitted;
ACK bit will be received
Repeated START will be transmitted;
STOP condition will be transmitted;
STO flag will be reset
STOP condition followed by a
START condition will be transmitted;
STO flag will be reset
I
not addressed slave will be entered
A START condition will be transmitted when the
bus becomes free
2
NEXT ACTION TAKEN BY SIO1 HARDWARE
C bus will be released;
P8xC660X2/661X2
Product data