LPC2210FBD144/01,5 NXP Semiconductors, LPC2210FBD144/01,5 Datasheet - Page 17

IC ARM7 MCU 16KRAM W/ADC 144LQFP

LPC2210FBD144/01,5

Manufacturer Part Number
LPC2210FBD144/01,5
Description
IC ARM7 MCU 16KRAM W/ADC 144LQFP
Manufacturer
NXP Semiconductors
Series
LPC2200r
Datasheet

Specifications of LPC2210FBD144/01,5

Program Memory Type
ROMless
Package / Case
144-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
60MHz
Connectivity
EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
76
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC22
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
16 KB
Interface Type
I2C/SPI/SSP/UART
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
76
Number Of Timers
2
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
OM10091 - KIT DEV PHYCORE-ARM7/LPC2220622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K568-1757 - BOARD EVAL FOR LPC220X ARM MCU
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4012
935282078551
LPC2210FBD144/01-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC2210FBD144/01,5
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
LPC2210_2220_6
Product data sheet
6.4.1 Interrupt sources
Non-vectored IRQs have the lowest priority.
The VIC combines the requests from all the vectored and non-vectored IRQs to produce
the IRQ signal to the ARM processor. The IRQ service routine can start by reading a
register from the VIC and jumping there. If any of the vectored IRQs are requesting, the
VIC provides the address of the highest-priority requesting IRQs service routine,
otherwise it provides the address of a default routine that is shared by all the non-vectored
IRQs. The default routine can read another VIC register to see what IRQs are active.
Table 5
one interrupt line connected to the VIC, but may have several internal interrupt flags.
Individual interrupt flags may also represent more than one interrupt source.
Table 5.
Block
WDT
-
ARM Core
ARM Core
TIMER0
TIMER1
UART0
UART1
PWM0
I
SPI0
SPI1 and SSP
PLL
RTC
System Control
A/D
2
C
lists the interrupt sources for each peripheral function. Each peripheral device has
Interrupt sources
Flag(s)
Watchdog Interrupt (WDINT)
Reserved for software interrupts only
EmbeddedICE, DbgCommRX
EmbeddedICE, DbgCommTX
Match 0 to 3 (MR0, MR1, MR2, MR3)
Match 0 to 3 (MR0, MR1, MR2, MR3)
RX Line Status (RLS)
Transmit Holding Register Empty (THRE)
RX Data Available (RDA)
Character Time-out Indicator (CTI)
RX Line Status (RLS)
Transmit Holding Register empty (THRE)
RX Data Available (RDA)
Character Time-out Indicator (CTI)
Modem Status Interrupt (MSI)
Match 0 to 6 (MR0, MR1, MR2, MR3, MR4, MR5, MR6)
SI (state change)
SPIF, MODF
SPIF, MODF and TXRIS, RXRIS, RTRIS, RORRIS
PLL Lock (PLOCK)
RTCCIF (Counter Increment), RTCALF (Alarm)
External Interrupt 0 (EINT0)
External Interrupt 1 (EINT1)
External Interrupt 2 (EINT2)
External Interrupt 3 (EINT3)
ADC
Rev. 06 — 11 December 2008
16/32-bit ARM microcontrollers
LPC2210/2220
© NXP B.V. 2008. All rights reserved.
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