LPC2387FBD100,551 NXP Semiconductors, LPC2387FBD100,551 Datasheet
LPC2387FBD100,551
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LPC2387FBD100-S
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LPC2387 Single-chip 16-bit/32-bit MCU; 512 kB flash with ISP/IAP, Ethernet, USB 2.0 device/host/OTG, CAN, and 10-bit ADC/DAC Rev. 03 — 29 October 2008 1. General description The LPC2387 microcontroller is based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time emulation that ...
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... NXP Semiconductors I Serial interfaces: N Ethernet MAC with associated DMA controller. These functions reside on an independent AHB. N USB 2.0 device/host/OTG with on-chip PHY and associated DMA controller. N Four UARTs with fractional baud rate generation, one with modem control I/O, one with IrDA support, all with FIFO. ...
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... NXP Semiconductors I On-chip PLL allows CPU operation up to the maximum CPU rate without the need for a high frequency crystal. May be run from the main oscillator, the internal RC oscillator, or the RTC oscillator. I Versatile pin function selections allow more possibilities for using on-chip peripheral functions ...
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... NXP Semiconductors 5. Block diagram LPC2387 P0, P1, P2, P3, P4 SRAM HIGH-SPEED GPIO 70 PINS TOTAL AHB2 ETHERNET RMII(8) MAC WITH DMA EINT3 to EINT0 EXTERNAL INTERRUPTS P0 CAP0/CAP1/ CAPTURE/COMPARE CAP2/CAP3 TIMER0/TIMER1/ 4 MAT2, TIMER2/TIMER3 2 MAT0/MAT1/ MAT3 6 PWM1 PWM1 2 PCAP1 LEGACY GPI/O P0 PINS TOTAL 6 AD0 A/D CONVERTER AOUT ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 2. LPC2387 pinning LQFP100 package 6.2 Pin description Table 3. Pin description Symbol Pin P0[0] to P0[31] [1] P0[0]/RD1/TXD3/ 46 SDA1 [1] P0[1]/TD1/RXD3/ 47 SCL1 [1] P0[2]/TXD0 98 [1] P0[3]/RXD0 99 [1] P0[4]/I2SRX_CLK/ 81 RD2/CAP2[0] LPC2387_3 Product data sheet 1 LPC2387FBD100 ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin [1] P0[5]/I2SRX_WS/ 80 TD2/CAP2[1] [1] P0[6]/I2SRX_SDA/ 79 SSEL1/MAT2[0] [1] P0[7]/I2STX_CLK/ 78 SCK1/MAT2[1] [1] P0[8]/I2STX_WS/ 77 MISO1/MAT2[2] [1] P0[9]/I2STX_SDA/ 76 MOSI1/MAT2[3] [1] P0[10]/TXD2/ 48 SDA2/MAT3[0] [1] P0[11]/RXD2/ 49 SCL2/MAT3[1] [1] P0[15]/TXD1/ 62 SCK0/SCK [1] P0[16]/RXD1/ 63 SSEL0/SSEL LPC2387_3 Product data sheet Type Description I/O P0[5] — ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin [1] P0[17]/CTS1/ 61 MISO0/MISO [1] P0[18]/DCD1/ 60 MOSI0/MOSI [1] P0[19]/DSR1/ 59 MCICLK/SDA1 [1] P0[20]/DTR1/ 58 MCICMD/SCL1 [1] P0[21]/RI1/ 57 MCIPWR/RD1 [1] P0[22]/RTS1/ 56 MCIDAT0/TD1 [2] P0[23]/AD0[0]/ 9 I2SRX_CLK/ CAP3[0] [2] P0[24]/AD0[1]/ 8 I2SRX_WS/ CAP3[1] [2] P0[25]/AD0[2]/ 7 I2SRX_SDA/ TXD3 LPC2387_3 Product data sheet ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin [3] P0[26]/AD0[3]/ 6 AOUT/RXD3 [4] P0[27]/SDA0 25 [4] P0[28]/SCL0 24 [5] P0[29]/USB_D+ 29 [5] P0[30]/USB_D 30 P1[0] to P1[31] [1] P1[0]/ENET_TXD0 95 [1] P1[1]/ENET_TXD1 94 [1] P1[4]/ENET_TX_EN 93 [1] P1[8]/ENET_CRS 92 [1] P1[9]/ENET_RXD0 91 [1] P1[10]/ENET_RXD1 90 ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin [1] P1[19]/ 33 USB_TX_E1/ USB_PPWR1/ CAP1[1] [1] P1[20]/ 34 USB_TX_DP1/ PWM1[2]/SCK0 [1] P1[21]/ 35 USB_TX_DM1/ PWM1[3]/SSEL0 [1] P1[22]/ 36 USB_RCV1/ USB_PWRD1/ MAT1[0] [1] P1[23]/ 37 USB_RX_DP1/ PWM1[4]/MISO0 [1] P1[24]/ 38 USB_RX_DM1/ PWM1[5]/MOSI0 [1] P1[25]/ 39 USB_LS1/ USB_HSTEN1/ MAT1[1] [1] P1[26]/ 40 USB_SSPND1/ PWM1[6]/ CAP0[0] [1] P1[27]/ ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin [1] P1[29]/USB_SDA1/ 45 PCAP1[1]/MAT0[1] [2] P1[30]/V /AD0[4] 21 BUS [2] P1[31]/SCK1/AD0[5] 20 P2[0] to P2[31] [1] P2[0]/PWM1[1]/ 75 TXD1/TRACECLK [1] P2[1]/PWM1[2]/ 74 RXD1/PIPESTAT0 [1] P2[2]/PWM1[3]/ 73 CTS1/PIPESTAT1 [1] P2[3]/PWM1[4]/ 70 DCD1/PIPESTAT2 [1] P2[4]/PWM1[5]/ 69 DSR1/TRACESYNC [1] P2[5]/PWM1[6]/ 68 DTR1/TRACEPKT0 LPC2387_3 Product data sheet ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin [1] P2[6]/PCAP1[0]/RI1/ 67 TRACEPKT1 [1] P2[7]/RD2/ 66 RTS1/TRACEPKT2 [1] P2[8]/TD2/ 65 TXD2/TRACEPKT3 [1] P2[9]/ 64 USB_CONNECT/ RXD2/EXTIN0 [6] P2[10]/EINT0 53 [6] P2[11]/EINT1/ 52 MCIDAT1/ I2STX_CLK [6] P2[12]/EINT2/ 51 MCIDAT2/ I2STX_WS [6] P2[13]/EINT3/ 50 MCIDAT3/ I2STX_SDA P3[0] to P3[31] [1] P3[25]/MAT0[0]/ 27 PWM1[2] ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin [1] P3[26]/MAT0[1]/ 26 PWM1[3] P4[0] to P4[31] [1] P4[28]/MAT2[0]/ 82 TXD3 [1] P4[29]/MAT2[1]/ 85 RXD3 [1] TDO 1 [1] TDI 2 [1] TMS 3 [1] TRST 4 [1] TCK 5 [1] RTCK 100 RSTOUT 14 [7] RESET 17 [8] XTAL1 22 [8] XTAL2 23 [8] RTCX1 16 [8] ...
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... NXP Semiconductors Table 3. Pin description …continued Symbol Pin [13 DDA [13] VREF 12 [13] VBAT 19 [ tolerant pad providing digital I/O functions with TTL levels and hysteresis. [ tolerant pad providing digital I/O functions (with TTL levels and hysteresis) and analog input. When configured as a DAC input, digital section of the pad is disabled ...
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... NXP Semiconductors AHB peripherals are allocated range of addresses at the very top of the 4 GB ARM memory space. Each AHB peripheral is allocated address space within the AHB address space. Lower speed peripheral functions are connected to the APB. The AHB to APB bridge interfaces the APB to the AHB. APB peripherals are also allocated range of addresses, beginning at the 3 ...
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... NXP Semiconductors 7.3 On-chip SRAM The LPC2387 includes a SRAM memory reserved for the ARM processor exclusive use. This RAM may be used for code and/or data storage and may be accessed as 8 bits, 16 bits, and 32 bits SRAM block serving as a buffer for the Ethernet controller and SRAM associated with the USB device can be used both for data and code storage, too ...
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... NXP Semiconductors 3.75 GB Fig 3. LPC2387 memory map 7.5 Interrupt controller The ARM processor core has two interrupt inputs called Interrupt Request (IRQ) and Fast Interrupt Request (FIQ). The VIC takes 32 interrupt request inputs which can be programmed as FIQ or vectored IRQ types. The programmable assignment scheme means that priorities of interrupts from the various peripherals can be dynamically assigned and adjusted ...
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... NXP Semiconductors FIQs have the highest priority. If more than one request is assigned to FIQ, the VIC ORs the requests to produce the FIQ signal to the ARM processor. The fastest possible FIQ latency is achieved when only one request is classified as FIQ, because then the FIQ service routine can simply start dealing with that device ...
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... NXP Semiconductors • Single DMA and burst DMA request signals. Each peripheral connected to the GPDMA can assert either a burst DMA request or a single DMA request. The DMA burst size is set by programming the GPDMA. • Memory-to-memory, memory-to-peripheral, peripheral-to-memory, and peripheral-to-peripheral transfers. • ...
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... NXP Semiconductors Additionally, any pin on port 0 and port 2 (total of 42 pins) providing a digital function can be programmed to generate an interrupt on a rising edge, a falling edge, or both. The edge detection is asynchronous may operate when clocks are not present such as during Power-down mode. Each enabled interrupt can be used to wake up the chip from Power-down mode ...
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... NXP Semiconductors – Receive filtering. – Multicast and broadcast frame support for both transmit and receive. – Optional automatic Frame Check Sequence (FCS) insertion with Circular Redundancy Check (CRC) for transmit. – Selectable automatic transmit frame padding. – Over-length frame support for both transmit and receive allows any length frames. ...
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... NXP Semiconductors • Supports DMA transfers with the DMA RAM all non-control endpoints. • Allows dynamic switching between CPU-controlled and DMA modes. • Double buffer implementation for Bulk and Isochronous endpoints. 7.10.2 USB host controller The host controller enables full- and low-speed data exchange with USB devices attached to the bus. It consists of register interface, serial interface engine, and DMA controller. The register interface complies with the OHCI specifi ...
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... NXP Semiconductors 7.11.1 Features • Two CAN controllers and buses. • Data rates to 1 Mbit/s on each bus. • 32-bit register and RAM access. • Compatible with CAN specification 2.0B, ISO 11898-1 . • Global Acceptance Filter recognizes 11-bit and 29-bit receive identifiers for all CAN buses. • ...
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... NXP Semiconductors 7.14.1 Features • Receive and Transmit FIFOs. • Register locations conform to 16C550 industry standard. • Receiver FIFO trigger points and 14 B. • Built-in fractional baud rate generator covering wide range of baud rates without a need for external crystals of particular values. ...
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... NXP Semiconductors 7.17 SD/MMC card interface The Secure Digital and Multimedia Card Interface (MCI) allows access to external SD memory cards. The SD card interface conforms to the SD Multimedia Card Specification Version 2.11 . 7.17.1 Features • The MCI provides all functions specific to the SD/MMC memory card. These include the clock generation unit, power management control, and command and data transfer ...
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... NXP Semiconductors 2 7.19 I S-bus serial I/O controllers 2 The I S-bus provides a standard communication interface for digital audio applications. 2 The I S-bus specification defines a 3-wire serial bus using one data line, one clock line, and one word select signal. The basic I master, and one slave. The I and receive channel, each of which can operate as either a master or a slave ...
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... NXP Semiconductors – Do nothing on match. 7.21 Pulse width modulator The PWM is based on the standard Timer block and inherits all of its features, although only the PWM function is pinned out on the LPC2387. The Timer is designed to count cycles of the system derived clock and optionally switch pins, generate interrupts or perform other actions when specifi ...
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... NXP Semiconductors • Double edge controlled PWM outputs can be programmed to be either positive going or negative going pulses. • Match register updates are synchronized with pulse outputs to prevent generation of erroneous pulses. Software must ‘release’ new match values before they can become effective. • ...
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... NXP Semiconductors • Provides Seconds, Minutes, Hours, Day of Month, Month, Year, Day of Week, and Day of Year. • Dedicated 32 kHz oscillator or programmable prescaler from APB clock. • Dedicated power supply pin can be connected to a battery or to the main 3.3 V. • Periodic interrupts can be generated from increments of any field of the time registers, and selected fractional second values. • ...
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... NXP Semiconductors The PLL input, in the range of 32 kHz to 50 MHz, may initially be divided down by a value ‘N’, which may be in the range 256. This input division provides a wide range of output frequencies from the same input frequency. Following the PLL input divider is the PLL multiplier. This can multiply the input divider output through the use of a Current Controlled Oscillator (CCO value ‘ ...
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... NXP Semiconductors 7.24.4.1 Idle mode In Idle mode, execution of instructions is suspended until either a Reset or interrupt occurs. Peripheral functions continue operation during Idle mode and may generate interrupts to cause the processor to resume execution. Idle mode eliminates dynamic power used by the processor itself, memory systems and related controllers, and internal buses ...
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... NXP Semiconductors The first option assumes that power consumption is not a concern and the design ties the V DD(3V3) supply for both pads, the CPU, and peripherals. While this solution is simple, it does not support powering down the I/O pad ring “on the fly” while keeping the CPU and peripherals alive. The second option uses two power supplies ...
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... NXP Semiconductors 7.25.3 Code security (Code Read Protection - CRP) This feature of the LPC2387 allows user to enable different levels of security in the system so that access to the on-chip flash and use of the JTAG and ISP can be restricted. When needed, CRP is invoked by programming a specific pattern into a dedicated flash location. ...
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... NXP Semiconductors 7.26 Emulation and debugging The LPC2387 supports emulation and debugging via a JTAG serial port. A trace port allows tracing program execution. Debugging and trace functions are multiplexed only with GPIOs on P2[0] to P2[9]. This means that all communication, timer, and interface peripherals residing on other pins are available during the development and debugging phase as they are when the application is run in the embedded system itself ...
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... NXP Semiconductors 7.26.3 RealMonitor RealMonitor is a configurable software module, developed by ARM Inc., which enables real-time debug lightweight debug monitor that runs in the background while users debug their foreground application. It communicates with the host using the DCC, which is present in the EmbeddedICE logic. The LPC2387 contains a specific configuration of RealMonitor software programmed into the on-chip ROM memory ...
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... NXP Semiconductors 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage (3.3 V) DD(3V3) V DC-to-DC converter supply voltage DD(DCDC)(3V3) (3 analog 3.3 V pad supply voltage DDA V input voltage on pin VBAT i(VBAT) V input voltage on pin VREF ...
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... NXP Semiconductors 9. Static characteristics Table 5. Static characteristics +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter V supply voltage (3.3 V) DD(3V3) V DC-to-DC converter DD(DCDC)(3V3) supply voltage (3 analog 3.3 V pad supply DDA voltage V input voltage on pin i(VBAT) VBAT V input voltage on pin ...
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... NXP Semiconductors Table 5. Static characteristics +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter I active mode DC-to-DC DD(DCDC)act(3V3) converter supply current (3 power-down mode DD(DCDC)pd(3V3) DC-to-DC converter supply current (3 active mode battery BATact supply current 2 I C-bus pins (P0[27] and P0[28]) ...
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... NXP Semiconductors Table 5. Static characteristics +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter USB pins I OFF-state output OZ current V bus supply voltage BUS V differential input DI sensitivity voltage V differential common CM mode voltage range V single-ended receiver th(rs)se switching threshold voltage V LOW-level output ...
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... NXP Semiconductors Table 6. ADC static characteristics +85 C unless otherwise specified; ADC frequency 4.5 MHz. DDA amb Symbol Parameter V analog input voltage IA C analog input capacitance ia E differential linearity error D E integral non-linearity L(adj) E offset error O E gain error G E absolute error ...
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... NXP Semiconductors 1023 1022 1021 1020 1019 1018 7 code out offset error E O (1) Example of an actual transfer curve. (2) The ideal transfer curve. (3) Differential linearity error (E (4) Integral non-linearity (E L(adj) (5) Center of a step of the actual transfer curve. Fig 4. ADC characteristics LPC2387_3 Product data sheet ...
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... NXP Semiconductors AD0[y] Fig 5. Suggested ADC interface - LPC2387 AD0[y] pin LPC2387_3 Product data sheet LPC2XXX 20 k SAMPLE Rev. 03 — 29 October 2008 LPC2387 Single-chip 16-bit/32-bit microcontroller R vsi AD0[y] V EXT 002aac733 © NXP B.V. 2008. All rights reserved ...
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... NXP Semiconductors 10. Dynamic characteristics Table 7. Dynamic characteristics of USB pins (full-speed pF 1 Symbol Parameter t rise time r t fall time f t differential rise and fall time FRFM matching V output signal crossover voltage CRS t source SE0 interval of EOP FEOPT t source jitter for differential transition ...
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... NXP Semiconductors 10.1 Timing Fig 6. External clock timing t PERIOD differential data lines Fig 7. Differential data-to-EOP transition skew and EOP width shifting edges SCK MOSI MISO Fig 8. MISO line set-up time in SSP Master mode LPC2387_3 Product data sheet t t CHCL CLCX crossover point ...
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... NXP Semiconductors 11. Application information 11.1 Suggested USB interface solutions LPC23XX Fig 9. LPC2387 USB interface on a self-powered device LPC23XX Fig 10. LPC2387 USB interface on a bus-powered device LPC2387_3 Product data sheet Single-chip 16-bit/32-bit microcontroller V DD(3V3) USB_UP_LED USB_CONNECT soft-connect switch R1 1 BUS USB_D USB_D ...
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... NXP Semiconductors RSTOUT LPC2387 USB_SCL USB_SDA EINTn USB_D+ USB_D Fig 11. LPC2387 USB OTG port configuration USB_UP_LED USB_D+ USB_D LPC2387 USB_PWRD USB_OVRCR USB_PPWR Fig 12. LPC2387 USB host port configuration LPC2387_3 Product data sheet RESET_N ADR/PSW OE_N/INT_N V DD SPEED ISP1301 SUSPEND ...
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... NXP Semiconductors USB_UP_LED USB_CONNECT LPC2387 USB_D+ USB_D V BUS Fig 13. LPC2387 USB device port configuration LPC2387_3 Product data sheet Single-chip 16-bit/32-bit microcontroller Rev. 03 — 29 October 2008 LPC2387 USB-B D connector V BUS 002aae169 © NXP B.V. 2008. All rights reserved ...
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... NXP Semiconductors 12. Package outline LQFP100: plastic low profile quad flat package; 100 leads; body 1 pin 1 index 100 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 1.45 1.6 mm 0.25 0.05 1.35 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors 13. Abbreviations Table 9. Acronym ADC AHB AMBA APB BOD CAN DAC DCC DMA DSP EOP ETM GP GPIO IrDA JTAG MII MIIM PHY PLL PWM RMII SE0 SPI SSI SSP TTL UART USB LPC2387_3 Product data sheet Abbreviations Description Analog-to-Digital Converter ...
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... NXP Semiconductors 14. Revision history Table 10. Revision history Document ID Release date LPC2387_3 20081029 • Modifications: Added USB host/OTG features • Table • Table • Table • Table LPC2387_2 20080201 LPC2387_1 20080114 LPC2387_3 Product data sheet Data sheet status Product data sheet 4: changed storage temperature range from 40 C/125 C/150 C ...
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... NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 4.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 7 Functional description . . . . . . . . . . . . . . . . . . 13 7.1 Architectural overview 7.2 On-chip flash programming memory . . . . . . . 14 7.3 On-chip SRAM . . . . . . . . . . . . . . . . . . . . . . . . 15 7.4 Memory map ...
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... NXP Semiconductors 15.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 15.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 16 Contact information Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Single-chip 16-bit/32-bit microcontroller Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp ...