LPC2129FBD64/01,15 NXP Semiconductors, LPC2129FBD64/01,15 Datasheet - Page 20
![IC ARM7 MCU FLASH 256K 64-LQFP](/photos/6/98/69856/568-64-lqfp_sot314-2_sml.jpg)
LPC2129FBD64/01,15
Manufacturer Part Number
LPC2129FBD64/01,15
Description
IC ARM7 MCU FLASH 256K 64-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2100r
Datasheet
1.LPC2109FBD640115.pdf
(44 pages)
Specifications of LPC2129FBD64/01,15
Program Memory Type
FLASH
Program Memory Size
256KB (256K x 8)
Package / Case
64-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
60MHz
Connectivity
CAN, I²C, Microwire, SPI, SSI, SSP, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
46
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC21
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
16 KB
Interface Type
CAN/I2C/JTAG/SPI/SSP/UART
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
46
Number Of Timers
2
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, KSK-LPC2129, KSK-LPC2129-PL, KSK-LPC2129E, KSK-LPC2129E-PL
Development Tools By Supplier
OM10041
Minimum Operating Temperature
- 40 C
On-chip Adc
4-ch x 10-bit
Package
64LQFP
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
60 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-4310 - EVAL BOARD LPC2158 W/LCD568-4297 - BOARD EVAL LPC21XX MCB2100MCB2100 - BOARD EVAL NXP LPC211X/LPC212X622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4315
935284889151
LPC2129FBD64/01-S
LPC2129FBD64/01-S
935284889151
LPC2129FBD64/01-S
LPC2129FBD64/01-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2129FBD64/01,15
Manufacturer:
Microchip
Quantity:
2 900
Company:
Part Number:
LPC2129FBD64/01,15
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Product data sheet
LPC2109_2119_2129_6
6.17.1 Features
6.18.1 Crystal oscillator
6.18 System control
Three match registers can be used to provide a PWM output with both edges controlled.
Again, the MR0 match register controls the PWM cycle rate. The other match registers
control the two PWM edge positions. Additional double edge controlled PWM outputs
require only two match registers each, since the repetition rate is the same for all PWM
outputs.
With double edge controlled PWM outputs, specific match registers control the rising and
falling edge of the output. This allows both positive going PWM pulses (when the rising
edge occurs prior to the falling edge), and negative going PWM pulses (when the falling
edge occurs prior to the rising edge).
The oscillator supports crystals in the range of 1 MHz to 30 MHz. The oscillator output
frequency is called f
purposes of rate equations, etc.. f
running and connected. Refer to
•
•
•
•
•
•
•
•
Seven match registers allow up to six single edge controlled or three double edge
controlled PWM outputs, or a mix of both types.
The match registers also allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
Supports single edge controlled and/or double edge controlled PWM outputs. Single
edge controlled PWM outputs all go HIGH at the beginning of each cycle unless the
output is a constant LOW. Double edge controlled PWM outputs can have either edge
occur at any position within a cycle. This allows for both positive going and negative
going pulses.
Pulse period and width can be any number of timer counts. This allows complete
flexibility in the trade-off between resolution and repetition rate. All PWM outputs will
occur at the same repetition rate.
Double edge controlled PWM outputs can be programmed to be either positive going
or negative going pulses.
Match register updates are synchronized with pulse outputs to prevent generation of
erroneous pulses. Software must ‘release’ new match values before they can become
effective.
May be used as a standard timer if the PWM mode is not enabled.
A 32-bit Timer/Counter with a programmable 32-bit Prescaler.
osc
Rev. 06 — 10 December 2007
and the ARM processor clock frequency is referred to as CCLK for
Section 6.18.2 “PLL”
osc
and CCLK are the same value unless the PLL is
LPC2109/2119/2129
Single-chip 16/32-bit microcontrollers
for additional information.
© NXP B.V. 2007. All rights reserved.
20 of 44