LPC2129FBD64/01,15 NXP Semiconductors, LPC2129FBD64/01,15 Datasheet - Page 6

• Manufacturer Part Number: LPC2129FBD64/01,15
• Description: IC ARM7 MCU FLASH 256K 64-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2100r

Specifications of LPC2129FBD64/01,15

• Program Memory Type: FLASH
• Program Memory Size: 256KB (256K x 8)
• Package / Case: 64-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, Microwire, SPI, SSI, SSP, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 46
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC21
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 16 KB
• Interface Type: CAN/I2C/JTAG/SPI/SSP/UART
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 46
• Number Of Timers: 2
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, KSK-LPC2129, KSK-LPC2129-PL, KSK-LPC2129E, KSK-LPC2129E-PL
• Development Tools By Supplier: OM10041
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 10-bit
• Package: 64LQFP
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 60 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4310 - EVAL BOARD LPC2158 W/LCD568-4297 - BOARD EVAL LPC21XX MCB2100MCB2100 - BOARD EVAL NXP LPC211X/LPC212X622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4315; 935284889151; LPC2129FBD64/01-S; LPC2129FBD64/01-S

NXP Semiconductors
Table 3.
Product data sheet
LPC2109_2119_2129_6
Symbol
P0[0] to P0[31]
P0[0]/TXD0/
PWM1
P0[1]/RXD0/
PWM3/EINT0
P0[2]/SCL/
CAP0[0]
P0[3]/SDA/
MAT0[0]/EINT1
P0[4]/SCK0/
CAP0[1]
P0[5]/MISO0/
MAT0[1]
P0[6]/MOSI0/
CAP0[2]
P0[7]/SSEL0/
PWM2/EINT2
P0[8]/TXD1/
PWM4
P0[9]/RXD1/
PWM6/EINT3
P0[10]/RTS1/
CAP1[0]
P0[11]/CTS1/
CAP1[1]
P0[12]/DSR1/
MAT1[0]
P0[13]/DTR1/
MAT1[1]
P0[14]/DCD1/
EINT1
Pin description
5.2 Pin description
Pin
19
21
22
26
27
29
30
31
33
34
35
37
38
39
41
Type Description
I/O
O
O
I
O
I
I/O
I
I/O
O
I
I/O
I
I/O
O
I/O
I
I
O
I
O
O
I
O
I
O
I
I
I
I
O
O
O
I
I
Port 0 is a 32-bit bidirectional I/O port with individual direction controls for each bit.
The operation of port 0 pins depends upon the pin function selected via the Pin
Connect Block. Pins 26 and 31 of port 0 are not available.
TXD0 — Transmitter output for UART0.
PWM1 — Pulse Width Modulator output 1.
RXD0 — Receiver input for UART0.
PWM3 — Pulse Width Modulator output 3.
EINT0 — External interrupt 0 input
SCL — I
CAP0[0] — Capture input for Timer 0, channel 0.
SDA — I
MAT0[0] — Match output for Timer 0, channel 0.
EINT1 — External interrupt 1 input.
SCK0 — Serial clock for SPI0. SPI clock output from master or input to slave.
CAP0[1] — Capture input for Timer 0, channel 1.
MISO0 — Master In Slave OUT for SPI0. Data input to SPI master or data output
from SPI slave.
MAT0[1] — Match output for Timer 0, channel 1.
MOSI0 — Master Out Slave In for SPI0. Data output from SPI master or data input
to SPI slave.
CAP0[2] — Capture input for Timer 0, channel 2.
SSEL0 — Slave Select for SPI0. Selects the SPI interface as a slave.
PWM2 — Pulse Width Modulator output 2.
EINT2 — External interrupt 2 input.
TXD1 — Transmitter output for UART1.
PWM4 — Pulse Width Modulator output 4.
RXD1 — Receiver input for UART1.
PWM6 — Pulse Width Modulator output 6.
EINT3 — External interrupt 3 input.
RTS1 — Request to Send output for UART1.
CAP1[0] — Capture input for Timer 1, channel 0.
CTS1 — Clear to Send input for UART1.
CAP1[1] — Capture input for Timer 1, channel 1.
DSR1 — Data Set Ready input for UART1.
MAT1[0] — Match output for Timer 1, channel 0.
DTR1 — Data Terminal Ready output for UART1.
MAT1[1] — Match output for Timer 1, channel 1.
DCD1 — Data Carrier Detect input for UART1.
EINT1 — External interrupt 1 input.
Note: LOW on this pin while RESET is LOW forces on-chip bootloader to take
control of the part after reset.
Rev. 06 — 10 December 2007
2
2
C-bus clock input/output. Open-drain output (for I
C-bus data input/output. Open-drain output (for I
LPC2109/2119/2129
Single-chip 16/32-bit microcontrollers
2
2
C-bus compliance).
C-bus compliance).
© NXP B.V. 2007. All rights reserved.
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