ADUC834BSZ Analog Devices Inc, ADUC834BSZ Datasheet - Page 43

IC ADC DUAL16/24BIT W/MCU 52MQFP

ADUC834BSZ

Manufacturer Part Number
ADUC834BSZ
Description
IC ADC DUAL16/24BIT W/MCU 52MQFP
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC8xxr
Datasheets

Specifications of ADUC834BSZ

Core Size
8-Bit
Program Memory Size
62KB (62K x 8)
Oscillator Type
Internal
Core Processor
8052
Speed
12.58MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
POR, PSM, PWM, Temp Sensor, WDT
Number Of I /o
34
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.25 V
Data Converters
A/D 3x16b, 4x24b; D/A 1x12b
Operating Temperature
-40°C ~ 125°C
Package / Case
52-MQFP, 52-PQFP
Controller Family/series
(8052) ADUC
No. Of I/o's
26
Eeprom Memory Size
62KB
Ram Memory Size
2KB
Cpu Speed
12.58MHz
Package
52MQFP
Device Core
8052
Family Name
ADuC8xx
Maximum Speed
12.58 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
26
Interface Type
I2C/SPI/UART
On-chip Adc
4-chx16-bit|4-chx24-bit
On-chip Dac
1-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PSMCON
SFR Address
Power-On Default Value
Bit Addressable
POWER SUPPLY MONITOR
As its name suggests, the Power Supply Monitor, once enabled,
monitors both supplies (AV
indicate when any of the supply pins drop below one of four
user-selectable voltage trip points from 2.63 V to 4.63 V. For
correct operation of the Power Supply Monitor function, AV
must be equal to or greater than 2.7 V. Monitor function is
controlled via the PSMCON SFR. If enabled via the IEIP2 SFR,
Bit
7
6
5
4
3
2
1
0
REV. A
Name
CMPD
CMPA
PSMI
TPD1
TPD0
TPA1
TPA0
PSMEN
DD
or DV
Description
DV
This is a read-only bit and directly reflects the state of the DV
Read 1 indicates the DV
Read 0 indicates the DV
AV
This is a read-only bit and directly reflects the state of the AV
Read 1 indicates the AV
Read 0 indicates the AV
Power Supply Monitor Interrupt Bit.
This bit will be set high by the MicroConverter if either CMPA or CMPD are low, indicating low
analog or digital supply. The PSMI bit can be used to interrupt the processor. Once CMPD and/or
CMPA return (and remain) high, a 250 ms counter is started. When this counter timesout, the
PSMI interrupt is cleared. PSMI can also be written by the user. However, if either comparator
output is low, it is not possible for the user to clear PSMI.
DV
These bits select the DV
TPD1
0
0
1
1
AV
These bits select the AV
TPA1TPA0
0
0
1
1
Power Supply Monitor Enable Bit.
Set to 1 by the user to enable the Power Supply Monitor Circuit.
Cleared to 0 by the user to disable the Power Supply Monitor Circuit.
DD
DD
DD
DD
DD
Power Supply Monitor Control Register
DFH
DEH
No
0
1
0
1
0
1
0
1
Comparator Bit.
Trip Point Selection Bits.
Comparator Bit.
Trip Point Selection Bits.
) on the ADuC834. It will
Table XX. PSMCON SFR Bit Designations
TPD0
4.63
3.08
2.93
2.63
Selected AV
4.63
3.08
2.93
2.63
DD
DD
DD
DD
DD
DD
Selected DV
supply is above its selected trip point.
supply is below its selected trip point.
trip point voltage as follows:
DD
supply is above its selected trip point.
supply is below its selected trip point.
trip point voltage as follows:
DD
Trip Point (V)
–43–
DD
the monitor will interrupt the core using the PSMI bit in the
PSMCON SFR. This bit will not be cleared until the failing power
supply has returned above the trip point for at least 250 ms. This
monitor function allows the user to save working registers to avoid
possible data loss due to the low supply condition, and also
ensures that normal code execution will not resume until a safe
supply level has been well established. The supply monitor is also
protected against spurious glitches triggering the interrupt circuit.
Trip Point (V)
DD
DD
comparator.
comparator.
ADuC834

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