ADUC834BSZ Analog Devices Inc, ADUC834BSZ Datasheet - Page 75

IC ADC DUAL16/24BIT W/MCU 52MQFP

ADUC834BSZ

Manufacturer Part Number
ADUC834BSZ
Description
IC ADC DUAL16/24BIT W/MCU 52MQFP
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC8xxr
Datasheets

Specifications of ADUC834BSZ

Core Size
8-Bit
Program Memory Size
62KB (62K x 8)
Oscillator Type
Internal
Core Processor
8052
Speed
12.58MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
POR, PSM, PWM, Temp Sensor, WDT
Number Of I /o
34
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.25 V
Data Converters
A/D 3x16b, 4x24b; D/A 1x12b
Operating Temperature
-40°C ~ 125°C
Package / Case
52-MQFP, 52-PQFP
Controller Family/series
(8052) ADUC
No. Of I/o's
26
Eeprom Memory Size
62KB
Ram Memory Size
2KB
Cpu Speed
12.58MHz
Package
52MQFP
Device Core
8052
Family Name
ADuC8xx
Maximum Speed
12.58 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
26
Interface Type
I2C/SPI/UART
On-chip Adc
4-chx16-bit|4-chx24-bit
On-chip Dac
1-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADUC834BSZ
Manufacturer:
TOSHIBA
Quantity:
1 200
Part Number:
ADUC834BSZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
ADUC834BSZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Parameter
SPI MASTER MODE TIMING (CPHA = 1)
*Characterized under the following conditions:
REV. A
Core clock divider bits CD2, CD1, and CD0 in PLLCON SFR set to 0, 1, and 1, respectively, i.e., core clock frequency = 1.57 MHz, and
SPI bit-rate selection bits SPR1 and SPR0 in SPICON SFR set to 0 and 0, respectively.
t
t
t
t
t
t
t
t
t
DAV
DSU
DHD
DF
DR
SF
SL
SH
SR
SCLOCK Low Pulsewidth*
SCLOCK High Pulsewidth*
Data Output Valid after SCLOCK Edge
Data Input Setup Time before SCLOCK Edge
Data Input Hold Time after SCLOCK Edge
Data Output Fall Time
Data Output Rise Time
SCLOCK Rise Time
SCLOCK Fall Time
(CPOL = 0)
(CPOL = 1)
SCLOCK
SCLOCK
MOSI
MISO
t
DOSU
t
DSU
MSB IN
Figure 75. SPI Master Mode Timing (CPHA = 1)
MSB
t
DHD
t
SH
t
DF
t
DAV
t
SL
t
DR
BITS 6–1
BITS 6–1
–75–
Min
100
100
Typ
630
630
10
10
10
10
LSB IN
t
SR
LSB
Max
50
25
25
25
25
t
SF
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ADuC834
Figure
75
75
75
75
75
75
75
75
75

Related parts for ADUC834BSZ