ST72F324BK4T3 STMicroelectronics, ST72F324BK4T3 Datasheet - Page 13

• Manufacturer Part Number: ST72F324BK4T3
• Description: IC MCU 8BIT 16K FLASH 32-TQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F324BK4T3

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 32-TQFP, 32-VQFP
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• A/d Bit Size: 10 bit
• A/d Channels Available: 12
• Height: 1.4 mm
• Length: 7 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 3.8 V
• Width: 7 mm
• For Use With: 497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-8241; ST72F324BK4T3

ST72324B-Auto
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Figure 92.
Single master/single slave application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Generic SS timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Hardware/software slave select management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Data clock timing diagram(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Clearing the WCOL bit (Write Collision flag) software sequence . . . . . . . . . . . . . . . . . . . 104
Single master/multiple slave configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
SCI block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Word length programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
SCI baud rate and extended prescaler block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Bit sampling in Reception mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
ADC block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
f
Typical application with an external clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
Typical application with a crystal or ceramic resonator (8/16 Kbyte Flash
and ROM devices) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
Typical application with a crystal or ceramic resonator (32 Kbyte Flash
and ROM devices) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
Typical f
Integrated PLL jitter vs signal frequency(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
Unused I/O pins configured as input(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
Typical I
Typical V
Typical V
Typical V
Typical V
Typical V
Typical V
RESET pin protection when LVD is enabled(1)(2)(3)(4)(5)(6) . . . . . . . . . . . . . . . . . . . . . 167
RESET pin protection when LVD is disabled(1)(2)(3)(4) . . . . . . . . . . . . . . . . . . . . . . . . . 167
Two typical applications with ICCSEL/V
SPI slave timing diagram with CPHA = 0(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170
SPI slave timing diagram with CPHA = 1(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170
SPI master timing diagram(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171
R
Recommended C
Typical A/D converter application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172
Power supply filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173
ADC accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174
44-pin low profile quad flat package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175
32-pin low profile quad flat package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176
pin 1 orientation in tape and reel conditioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 178
ST72F324Bxx-Auto Flash commercial product structure . . . . . . . . . . . . . . . . . . . . . . . . . 182
ST72P324Bxx-Auto FastROM commercial product structure. . . . . . . . . . . . . . . . . . . . . . 184
ST72324Bxx-Auto ROM commercial product structure . . . . . . . . . . . . . . . . . . . . . . . . . . 185
CPU
AIN
max versus V
max. vs f
OSC(RCINT)
PU
OL
OL
OH
OL
OL
OH
vs. V
at V
at V
vs. V
vs. V
at V
vs. V
ADC
DD
DD
DD
DD
DD
DD
AIN
DD
DD
with C
= 5V (high-sink ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
= 5V (standard ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
vs T
with V
= 5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
(standard ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
(high-sink ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
and R
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
A
AIN
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
AIN
= V
= 0pF(1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172
Doc ID13466 Rev 4
values(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
PP
pin(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168
List of figures
13/198