ST72F324BK4T3 STMicroelectronics, ST72F324BK4T3 Datasheet - Page 69
ST72F324BK4T3
Manufacturer Part Number
ST72F324BK4T3
Description
IC MCU 8BIT 16K FLASH 32-TQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST72F324BJ2T6.pdf
(198 pages)
Specifications of ST72F324BK4T3
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
ST72F3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
A/d Bit Size
10 bit
A/d Channels Available
12
Height
1.4 mm
Length
7 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
3.8 V
Width
7 mm
For Use With
497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
497-8241
ST72F324BK4T3
ST72F324BK4T3
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST72F324BK4T3
Manufacturer:
STMicroelectronics
Quantity:
10 000
Company:
Part Number:
ST72F324BK4T3TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
ST72324B-Auto
10.1.9
10.2
10.2.1
Control register (WDGCR)
Table 35.
Table 36.
Main clock controller with real-time clock and beeper
(MCC/RTC)
The main clock controller consists of three different functions:
●
●
●
Each function can be used independently and simultaneously.
Programmable CPU clock prescaler
The programmable CPU clock prescaler supplies the clock for the ST7 CPU and its internal
peripherals. It manages Slow power saving mode (see
for more details).
The prescaler selects the f
MCCSR register: CP[1:0] and SMS.
WDGCR
Address (Hex.) Register label
Bit
6:0
7
WDGA
R/W
a programmable CPU clock prescaler
a clock-out signal to supply external devices
a real-time clock timer with interrupt capability
7
002Ah
WDGA
Name
T[6:0]
WDGCR register description
Watchdog timer register map and reset values
Activation bit
7-bit counter (MSB to LSB)
This bit is set by software and only cleared by hardware after a reset. When
WDGA = 1, the watchdog can generate a reset.
0: Watchdog disabled
1: Watchdog enabled
Note: This bit is not used if the hardware watchdog option is enabled by option byte.
These bits contain the value of the Watchdog counter, which is decremented every
16384 f
(T6 is cleared).
6
WDGCR
reset value
OSC2
CPU
cycles (approx.). A reset is produced when it rolls over from 40h to 3Fh
5
Doc ID13466 Rev 4
main clock frequency and is controlled by three bits in the
WDGA
7
0
4
T6
6
1
Function
T[6:0]
T5
R/W
5
1
3
Section 8.2: Slow mode on page 52
T4
4
1
2
Reset value: 0111 1111 (7F h)
T3
3
1
On-chip peripherals
T2
2
1
1
T1
1
1
0
69/198
T0
0
1