ST72F324BJ6B6 STMicroelectronics, ST72F324BJ6B6 Datasheet - Page 167

• Manufacturer Part Number: ST72F324BJ6B6
• Description: MCU 8BIT 32KB FLASH/ROM 42-SDIP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F324BJ6B6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-SDIP (0.600", 15.24mm)
• Controller Family/series: ST7
• No. Of I/o's: 32
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• No. Of Pwm Channels: 3
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-5589-5

ST72324Bxx
Figure 81. SPI slave timing diagram with CPHA = 0
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
Figure 82. SPI slave timing diagram with CPHA = 1
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave
mode) has its alternate function capability released. In this case, the pin status depends on the I/O port
configuration.
mode) has its alternate function capability released. In this case, the pin status depends on the I/O port
configuration.
MISO
MOSI
SS
MISO
MOSI
INPUT
SS
CPHA=1
CPOL=0
CPHA=1
CPOL=1
CPHA=0
CPOL=1
CPHA=0
CPOL=0
OUTPUT
INPUT
OUTPUT
INPUT
INPUT
t
a(SO)
see
note 2
See note 2
t
t
su(SS)
t
a(SO)
su(SS)
t
HZ
su(SI)
t
t
w(SCKH)
w(SCKL)
t
su(SI)
t
t
w(SCKH)
w(SCKL)
MSB OUT
MSB IN
MSB IN
t
MSB OUT
c(SCK)
t
h(SI)
t
h(SI)
t
v(SO)
t
c(SCK)
t
v(SO)
Bit 6 OUT
DD
DD
Bit 6 OUT
and 0.7xV
and 0.7xV
Bit 1 IN
t
h(SO)
(1)
(1)
Bit 1 IN
DD
DD
t
h(SO)
.
.
t
t
f(SCK)
r(SCK)
Electrical characteristics
t
t
f(SCK)
r(SCK)
LSB IN
LSB OUT
LSB IN
LSB OUT
t
h(SS)
t
h(SS)
t
dis(SO)
t
dis(SO)
note 2
See
see
note 2
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