ST72F324BJ6B6 STMicroelectronics, ST72F324BJ6B6 Datasheet - Page 67

• Manufacturer Part Number: ST72F324BJ6B6
• Description: MCU 8BIT 32KB FLASH/ROM 42-SDIP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F324BJ6B6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 42-SDIP (0.600", 15.24mm)
• Controller Family/series: ST7
• No. Of I/o's: 32
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• No. Of Pwm Channels: 3
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-5589-5

ST72324Bxx
Figure 34. Exact timeout duration (t
WHERE
t
t
t
CNT = value of T[5:0] bits in the WDGCR register (6 bits)
MSB and LSB are values from the table below depending on the timebase selected by the TB[1:0] bits in the MCCSR
register
To calculate the minimum Watchdog timeout (t
IF
ELSE
To calculate the maximum Watchdog timeout (t
IF
ELSE
NOTE: In the above formulae, division results must be rounded down to the next integer value.
EXAMPLE: With 2ms timeout selected in MCCSR register
min0
OSC2
max0
CNT
Value of T[5:0] bits in WDGCR register
CNT
= (LSB + 128) x 64 x t
= 16384 x t
= 125 ns if f
(MCCSR reg.)
t
t
max
min
:
<
≤
TB1 bit
MSB
-------------
MSB
-------------
4
0
0
1
1
=
=
4
t
t
min0
max0
OSC2
OSC2
THEN
THEN
(Hex.)
3F
00
+
+
= 8 MHz
16384
16384
OSC2
t
t
max
min
×
×
(MCCSR reg.)
=
⎛
⎝
=
⎛
⎝
CNT
CNT
t
t
TB0 bit
min0
max0
0
1
0
1
–
–
+
4CNT
---------------- -
+
MSB
4CNT
---------------- -
MSB
16384
16384
min
max
):
Min. Watchdog timeout (ms)
min
):
⎞
⎠
⎞
⎠
×
+
×
+
CNT
(
CNT
and t
(
192
192
Selected MCCSR timebase
×
+
+
×
1.496
LSB
t
LSB
t
128
t
osc2
max
min
osc2
)
)
×
)
×
10 ms
25 ms
2 ms
4 ms
64
64
×
×
4CNT
---------------- -
MSB
4CNT
---------------- -
MSB
Max. Watchdog timeout (ms)
×
×
t
osc2
t
osc2
On-chip peripherals
MSB
128.552
20
49
4
8
2.048
t
max
LSB
59
53
35
54
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