MC908JB16DWE Freescale Semiconductor, MC908JB16DWE Datasheet - Page 231

• Manufacturer Part Number: MC908JB16DWE
• Description: IC MCU 16K FLASH 6MHZ USB 28SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908JB16DWE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: SCI, USB
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: HC08JB
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C/SCI/SPI/USB
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 4
• Operating Supply Voltage: 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Controller Family/series: HC08
• No. Of I/o's: 21
• Ram Memory Size: 384Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MC68HC908JB16
Freescale Semiconductor
—
Rev. 1.1
M — Mode (Character Length) Bit
WAKE — Wakeup Condition Bit
ILTY — Idle Line Type Bit
PEN — Parity Enable Bit
This read/write bit determines whether SCI characters are eight or
nine bits long. (See
stop bit, as a receiver wakeup signal, or as a parity bit. Reset clears
the M bit.
This read/write bit determines which condition wakes up the SCI: a
logic 1 (address mark) in the most significant bit position of a received
character or an idle condition on the RxD pin. Reset clears the WAKE
bit.
This read/write bit determines when the SCI starts counting logic 1s
as idle character bits. The counting begins either after the start bit or
after the stop bit. If the count begins after the start bit, then a string of
logic 1s preceding the stop bit may cause false recognition of an idle
character. Beginning the count after the stop bit avoids false idle
character recognition, but requires properly synchronized
transmissions. Reset clears the ILTY bit.
This read/write bit enables the SCI parity function. (See
When enabled, the parity function inserts a parity bit in the most
significant bit position. (See
Serial Communications Interface Module (SCI)
1 = 9-bit SCI characters
0 = 8-bit SCI characters
1 = Address mark wakeup
0 = Idle line wakeup
1 = Idle character bit count begins after stop bit
0 = Idle character bit count begins after start bit
1 = Parity function enabled
0 = Parity function disabled
Table
12-5.) The ninth bit can serve as an extra
Figure
Serial Communications Interface Module (SCI)
12-3.) Reset clears the PEN bit.
Table
Technical Data
12-5.)
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