MC908JB16DWE Freescale Semiconductor, MC908JB16DWE Datasheet - Page 300

• Manufacturer Part Number: MC908JB16DWE
• Description: IC MCU 16K FLASH 6MHZ USB 28SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908JB16DWE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: SCI, USB
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: HC08JB
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C/SCI/SPI/USB
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 4
• Operating Supply Voltage: 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Controller Family/series: HC08
• No. Of I/o's: 21
• Ram Memory Size: 384Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Computer Operating Properly (COP)
17.4.5 Internal Reset
17.4.6 Reset Vector Fetch
17.4.7 COPD (COP Disable)
17.4.8 COPRS (COP Rate Select)
Technical Data
300
* LVIDR, LVI5OR3, URSTD, and LVID, are reset by POR or LVI reset only.
Address:
An internal reset clears the COP prescaler and the COP counter.
A reset vector fetch occurs when the vector address appears on the data
bus. A reset vector fetch clears the COP prescaler.
The COPD signal reflects the state of the COP disable bit (COPD) in the
CONFIG register. (See
The COPRS signal reflects the state of the COP rate select bit (COPRS)
in the CONFIG register. (See
COPRS — COP Rate Select Bit
COPD — COP Disable Bit
Reset:
Read:
Write:
COPRS selects the COP timeout period. Reset clears COPRS.
COPD disables the COP module.
1 = COP timeout period is 2
0 = COP timeout period is 2
1 = COP module disabled
0 = COP module enabled
LVIDR
$001F
Computer Operating Properly (COP)
Bit 7
0*
Figure 17-2. Configuration Register (CONFIG)
LVI5OR3
0*
6
Figure
URSTD
0*
5
Figure
17-2.)
LVID
13
18
0*
4
– 2
– 2
17-2.)
4
4
SSREC
OSCDCLK cycles
OSCDCLK cycles
3
0
MC68HC908JB16
COPRS
Freescale Semiconductor
2
0
STOP
1
0
—
Rev. 1.1
COPD
Bit 0
0