C8051F311-GM Silicon Laboratories Inc, C8051F311-GM Datasheet - Page 105
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C8051F311-GM
Manufacturer Part Number
C8051F311-GM
Description
IC 8051 MCU 16K FLASH 28MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F31xr
Datasheets
1.C8051F310-TB.pdf
(228 pages)
2.C8051F311-GM.pdf
(2 pages)
3.C8051F310-GQ.pdf
(218 pages)
Specifications of C8051F311-GM
Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
25
Number Of Timers
4 bit
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F310DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 17 Channel
No. Of I/o's
25
Ram Memory Size
1280Byte
Cpu Speed
25MHz
No. Of Timers
4
Rohs Compliant
Yes
Package
24QFN EP
Device Core
8051
Family Name
C8051F31x
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1446 - ADAPTER PROGRAM TOOLSTICK F311336-1253 - DEV KIT FOR C8051F310/F311
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1254
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F311-GM
Manufacturer:
SILICONLABS/芯科
Quantity:
20 000
Part Number:
C8051F311-GMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
9.
Reset circuitry allows the controller to be easily placed in a predefined default condition. On entry to this
reset state, the following occur:
•
•
•
•
All SFRs are reset to the predefined values noted in the SFR detailed descriptions. The contents of internal
data memory are unaffected during a reset; any previously stored data is preserved. However, since the
stack pointer SFR is reset, the stack is effectively lost, even though the data on the stack is not altered.
The Port I/O latches are reset to 0xFF (all logic ones) in open-drain mode. Weak pullups are enabled dur-
ing and after the reset. For V
exits the reset state.
On exit from the reset state, the program counter (PC) is reset, and the system clock defaults to the inter-
nal oscillator. Refer to
the system clock source. The Watchdog Timer is enabled with the system clock divided by 12 as its clock
source
Program execution begins at location 0x0000.
CIP-51 halts program execution
Special Function Registers (SFRs) are initialized to their defined reset values
External Port pins are forced to a known state
Interrupts and timers are disabled.
Px.x
Px.x
Reset Sources
(Section “18.3. Watchdog Timer Mode” on page 212
System
Clock
Comparator 0
Section “12. Oscillators” on page 121
+
-
Detector
Missing
C0RSEF
Clock
(one-
shot)
Microcontroller
EN
DD
Extended Interrupt
CIP-51
Monitor and power-on resets, the RST pin is driven low until the device
Core
Handler
Figure 9.1. Reset Sources
WDT
PCA
EN
VDD
System Reset
Supply
Monitor
+
-
Rev. 1.7
Enable
C8051F310/1/2/3/4/5/6/7
(Software Reset)
SWRSF
for information on selecting and configuring
details the use of the Watchdog Timer).
'0'
Power On
Reset
Operation
FLASH
Errant
(wired-OR)
Reset
Funnel
/RST
105