MCF52213CAE50 Freescale Semiconductor, MCF52213CAE50 Datasheet - Page 22

IC MCU 32BIT 128K FLASH 64-LQFP

MCF52213CAE50

Manufacturer Part Number
MCF52213CAE50
Description
IC MCU 32BIT 128K FLASH 64-LQFP
Manufacturer
Freescale Semiconductor
Series
MCF5221xr
Datasheet

Specifications of MCF52213CAE50

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART, USB OTG
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
56
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
MCF522x
Core
ColdFire V2
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, QSPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
43
Number Of Timers
18
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
M52210DEMO, M52211EVB
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
A/d Bit Size
12 bit
A/d Channels Available
8
Height
1.4 mm
Length
10 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Width
10 mm
For Use With
M52210DEMO - BOARD DEV MCF5221X LOW COST
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF52213CAE50
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Family Configurations
1.6
Table 8
1.7
Table 9
1.8
This device is compliant with industry standard USB 2.0 specification.
1.9
Table 10
22
Synchronous Peripheral
QSPI Synchronous
QSPI Synchronous
QSPI Serial Clock
External Interrupts
describes the external interrupt signals.
describes the QSPI signals.
Serial Data Input
describes the I
Signal Name
Serial Output
Signal Name
Chip Selects
External Interrupt Signals
Queued Serial Peripheral Interface (QSPI)
USB On-the-Go
I
2
1
2
C I/O Signals
CLKMOD[1:0]
The PLL pre-divider (CCHR+1) reset value is 6 and the PLL input reference range is 2–10 MHz,
so in order to boot with the PLL enabled, the external clock or crystal frequency needs to be
greater than 12 MHz. MCF5221x devices cannot boot with PLL enabled from an external clock
or crystal oscillator with frequency less than 12 MHz. This constraint does not apply to booting
with PLL disabled.
Cannot boot from the Internal 8 MHz Relaxation oscillator with the PLL enabled. Refer Note1.
Thus this mode has been removed from the table.
01
10
10
11
2
C serial interface module signals.
Table 9. Queued Serial Peripheral Interface (QSPI) Signals
QSPI_CS[3:0] QSPI peripheral chip select; can be programmed to be active high or
Abbreviation
Abbreviation
QSPI_DOUT Provides the serial data from the QSPI and can be programmed to be
QSPI_CLK
QSPI_DIN
IRQ[7:1]
XTAL
N/A
N/A
0
1
MCF52211 ColdFire Microcontroller, Rev. 2
Table 7. Clocking Modes (continued)
Table 8. External Interrupt Signals
PLL disabled, clock driven by crystal
PLL in normal mode, clock driven by external oscillator
Reserved
PLL in normal mode, clock driven by crystal
External interrupt sources.
driven on the rising or falling edge of QSPI_CLK.
Provides the serial data to the QSPI and can be programmed to be
sampled on the rising or falling edge of QSPI_CLK.
Provides the serial clock from the QSPI. The polarity and phase of
QSPI_CLK are programmable.
low.
2
Configure the clock mode.
Function
Function
1
Freescale Semiconductor
I/O
I/O
O
O
O
I
I

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