MCF52213CAE50 Freescale Semiconductor, MCF52213CAE50 Datasheet - Page 3
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MCF52213CAE50
Manufacturer Part Number
MCF52213CAE50
Description
IC MCU 32BIT 128K FLASH 64-LQFP
Manufacturer
Freescale Semiconductor
Series
MCF5221xr
Datasheet
1.MCF52213CAE50.pdf
(56 pages)
Specifications of MCF52213CAE50
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART, USB OTG
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
56
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
MCF522x
Core
ColdFire V2
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, QSPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
43
Number Of Timers
18
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
M52210DEMO, M52211EVB
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
A/d Bit Size
12 bit
A/d Channels Available
8
Height
1.4 mm
Length
10 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Width
10 mm
For Use With
M52210DEMO - BOARD DEV MCF5221X LOW COST
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF52213CAE50
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Family Configurations
1
3
1
Version 2 ColdFire Core with MAC
(Multiply-Accumulate Unit)
System Clock
Performance (Dhrystone 2.1 MIPS)
Flash / Static RAM (SRAM)
Interrupt Controller (INTC)
Fast Analog-to-Digital Converter (ADC)
USB On-The-Go (USB OTG)
Four-channel Direct-Memory Access (DMA)
Software Watchdog Timer (WDT)
Secondary Watchdog Timer
Two-channel Periodic Interrupt Timer (PIT)
Four-Channel General Purpose Timer (GPT)
32-bit DMA Timers
QSPI
UART(s)
I
Eight/Four-channel 8/16-bit PWM Timer
General Purpose I/O Module (GPIO)
Chip Configuration and Reset Controller Module
Background Debug Mode (BDM)
JTAG - IEEE 1149.1 Test Access Port
Package
2
C
The full debug/trace interface is available only on the 100-pin packages. A reduced debug interface is bonded on smaller
packages.
Family Configurations
Module
Table 1. MCF52211 Family Configurations
1
MCF52211 ColdFire Microcontroller, Rev. 2
64 LQFP/QFN
64/16 Kbytes
81 MAPBGA
52210
2
4
2
2
66, 80 MHz
up to 76
2 (64 LQFP/QFN and
128/16 Kbytes
64 LQFP/QFN
81 MAPBGA)
3 (100 LQFP)
81 MAPBGA
100 LQFP
52211
2
2
4
64/8 Kbytes
64 LQFP
52212
2
4
2
2
Freescale Semiconductor
up to 46
50 MHz
128/8 Kbytes
64 LQFP
52213
2
4
2
2